diff options
Diffstat (limited to 'atk16_fpga/alu_tb.v')
| -rw-r--r-- | atk16_fpga/alu_tb.v | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/atk16_fpga/alu_tb.v b/atk16_fpga/alu_tb.v index 7569e2d..559e23b 100644 --- a/atk16_fpga/alu_tb.v +++ b/atk16_fpga/alu_tb.v @@ -11,11 +11,11 @@ `define SAR 3'd7 `define TESTCASE(ma, msel, mb, mexpected, mflags) \ - sel <= `msel; \ - a <= ma; \ - b <= mb; \ + sel = `msel; \ + a = ma; \ + b = mb; \ #5 if (result != $unsigned(mexpected) || flags !== mflags) begin \ - failed <= 1; \ + failed = 1; \ $write("\033[0;31m[FAIL]\033[0m "); \ $display("%d msel %0d = %0d, flags %04b", a, b, result, flags); \ $display("_ expected result %0d", $unsigned(mexpected)); \ @@ -44,20 +44,20 @@ module alu_tb(); reg failed; initial begin - failed <= 0; + failed = 0; $dumpfile(`DUMPSTR(`VCD_OUTPUT)); $dumpvars(0, alu_tb); - `TESTCASE(10, PLUS, 20, 30, 4'b0000) - `TESTCASE(-1, PLUS, 1, 0, 4'b1001) + `TESTCASE(16'd10, PLUS, 16'd20, 16'd30, 4'b0000) + `TESTCASE(-16'd1, PLUS, 16'd1, 16'd0, 4'b1001) `TESTCASE(16'h7fff, PLUS, 16'h7fff, 16'hfffe, 4'b0110) - `TESTCASE(30, MINUS, 30, 0, 4'b0001) - `TESTCASE(30, MINUS, 40, -16'd10, 4'b1010) - `TESTCASE(16'h7fff, MINUS, 16'h7fff, 0, 4'b0001) + `TESTCASE(16'd30, MINUS, 16'd30, 16'd0, 4'b0001) + `TESTCASE(16'd30, MINUS, 16'd40, -16'd10, 4'b1010) + `TESTCASE(16'h7fff, MINUS, 16'h7fff, 16'd0, 4'b0001) `TESTCASE(16'h8000, MINUS, 16'h1, 16'h7fff, 4'b0100) - `TESTCASE(3'b110, AND, 3'b101, 3'b100, 4'b0000) - `TESTCASE(3'b110, OR, 3'b101, 3'b111, 4'b0000) - `TESTCASE(3'b110, XOR, 3'b101, 3'b011, 4'b0000) + `TESTCASE(16'b110, AND, 16'b101, 16'b100, 4'b0000) + `TESTCASE(16'b110, OR, 16'b101, 16'b111, 4'b0000) + `TESTCASE(16'b110, XOR, 16'b101, 16'b011, 4'b0000) `TESTCASE(16'b110, SHL, 16'd3, 16'b110000, 4'b0000) `TESTCASE(16'b1100_0000_0000_0000, SHR, 16'd3, 16'b0001_1000_0000_0000, 4'b0000) `TESTCASE(16'b1100_0000_0000_0000, SAR, 16'd3, 16'b1111_1000_0000_0000, 4'b0010) |