From 927c018f12e73c254cec32c0f60e1c01b9fc0319 Mon Sep 17 00:00:00 2001 From: Jan Tuomi Date: Wed, 21 Feb 2024 12:07:07 +0200 Subject: Refactor names --- Makefile | 18 +- atk16-asm/asm_eval.py | 47 - atk16-asm/asm_ops.py | 154 - atk16-asm/asm_pass0.py | 50 - atk16-asm/asm_pass1.py | 48 - atk16-asm/asm_pass2.py | 40 - atk16-asm/asm_pass3.py | 78 - atk16-asm/asm_pass4.py | 61 - atk16-asm/assembler.py | 82 - atk16-asm/optimizer.py | 189 -- atk16-asm/tokenizer.py | 47 - atk16-ast-walking-compiler/compiler.py | 716 ----- atk16-bytecode-compiler/bytecode_compiler.py | 220 -- atk16-syntax/README.md | 9 - atk16-syntax/atk16-syntax-0.0.1.vsix | Bin 4351 -> 0 bytes atk16-syntax/extension.js | 196 -- atk16-syntax/language-configuration.json | 41 - atk16-syntax/package.json | 48 - atk16-syntax/syntaxes/atk16.tmLanguage.json | 44 - atk16-utils/charmem.py | 63 - atk16-utils/convert_ttf.py | 52 - atk16-utils/dig_install.py | 60 - atk16-utils/pad_bin.py | 59 - atk16-utils/ucode.py | 112 - atk16_asm/asm_eval.py | 47 + atk16_asm/asm_ops.py | 154 + atk16_asm/asm_pass0.py | 50 + atk16_asm/asm_pass1.py | 48 + atk16_asm/asm_pass2.py | 40 + atk16_asm/asm_pass3.py | 78 + atk16_asm/asm_pass4.py | 61 + atk16_asm/assembler.py | 82 + atk16_asm/optimizer.py | 189 ++ atk16_asm/tokenizer.py | 47 + atk16_ast_walking_compiler/compiler.py | 716 +++++ atk16_bytecode_compiler/bytecode_compiler.py | 220 ++ atk16_syntax/README.md | 9 + atk16_syntax/atk16-syntax-0.0.1.vsix | Bin 0 -> 4351 bytes atk16_syntax/extension.js | 196 ++ atk16_syntax/language-configuration.json | 41 + atk16_syntax/package.json | 48 + atk16_syntax/syntaxes/atk16.tmLanguage.json | 44 + atk16_utils/charmem.py | 63 + atk16_utils/convert_ttf.py | 52 + atk16_utils/dig_install.py | 60 + atk16_utils/pad_bin.py | 59 + atk16_utils/ucode.py | 112 + digital-diagrams/atk16.dig | 2748 ---------------- digital-diagrams/atk16_alu.dig | 1695 ---------- digital-diagrams/atk16_alu_carryfix.dig | 270 -- digital-diagrams/atk16_alu_fo.dig | 494 --- digital-diagrams/atk16_alu_fz.dig | 192 -- digital-diagrams/atk16_alu_inputs.dig | 215 -- digital-diagrams/atk16_decoder.dig | 364 --- digital-diagrams/atk16_graphics_mode.dig | 311 -- digital-diagrams/atk16_irc.dig | 341 -- digital-diagrams/atk16_jump_unit.dig | 193 -- digital-diagrams/atk16_mem.dig | 949 ------ digital-diagrams/atk16_mem_mux.dig | 276 -- digital-diagrams/atk16_peripherals.dig | 852 ----- digital-diagrams/atk16_ppu.dig | 827 ----- digital-diagrams/atk16_ppu_palette.dig | 225 -- digital-diagrams/atk16_ppu_sprite_eval.dig | 4325 -------------------------- digital-diagrams/atk16_regbank.dig | 1499 --------- digital-diagrams/atk16_tpu.dig | 1165 ------- digital-diagrams/atk16_ucode_addr.dig | 741 ----- digital-diagrams/atk16_vga_sync.dig | 999 ------ digital_diagrams/atk16.dig | 2748 ++++++++++++++++ digital_diagrams/atk16_alu.dig | 1695 ++++++++++ digital_diagrams/atk16_alu_carryfix.dig | 270 ++ digital_diagrams/atk16_alu_fo.dig | 494 +++ digital_diagrams/atk16_alu_fz.dig | 192 ++ digital_diagrams/atk16_alu_inputs.dig | 215 ++ digital_diagrams/atk16_decoder.dig | 364 +++ digital_diagrams/atk16_graphics_mode.dig | 311 ++ digital_diagrams/atk16_irc.dig | 341 ++ digital_diagrams/atk16_jump_unit.dig | 193 ++ digital_diagrams/atk16_mem.dig | 949 ++++++ digital_diagrams/atk16_mem_mux.dig | 276 ++ digital_diagrams/atk16_peripherals.dig | 852 +++++ digital_diagrams/atk16_ppu.dig | 827 +++++ digital_diagrams/atk16_ppu_palette.dig | 225 ++ digital_diagrams/atk16_ppu_sprite_eval.dig | 4325 ++++++++++++++++++++++++++ digital_diagrams/atk16_regbank.dig | 1499 +++++++++ digital_diagrams/atk16_tpu.dig | 1165 +++++++ digital_diagrams/atk16_ucode_addr.dig | 741 +++++ digital_diagrams/atk16_vga_sync.dig | 999 ++++++ 87 files changed, 21106 insertions(+), 21106 deletions(-) delete mode 100644 atk16-asm/asm_eval.py delete mode 100644 atk16-asm/asm_ops.py delete mode 100644 atk16-asm/asm_pass0.py delete mode 100644 atk16-asm/asm_pass1.py delete mode 100644 atk16-asm/asm_pass2.py delete mode 100644 atk16-asm/asm_pass3.py delete mode 100644 atk16-asm/asm_pass4.py delete mode 100755 atk16-asm/assembler.py delete mode 100644 atk16-asm/optimizer.py delete mode 100644 atk16-asm/tokenizer.py delete mode 100644 atk16-ast-walking-compiler/compiler.py delete mode 100644 atk16-bytecode-compiler/bytecode_compiler.py delete mode 100644 atk16-syntax/README.md delete mode 100644 atk16-syntax/atk16-syntax-0.0.1.vsix delete mode 100644 atk16-syntax/extension.js delete mode 100644 atk16-syntax/language-configuration.json delete mode 100644 atk16-syntax/package.json delete mode 100644 atk16-syntax/syntaxes/atk16.tmLanguage.json delete mode 100644 atk16-utils/charmem.py delete mode 100644 atk16-utils/convert_ttf.py delete mode 100644 atk16-utils/dig_install.py delete mode 100644 atk16-utils/pad_bin.py delete mode 100755 atk16-utils/ucode.py create mode 100644 atk16_asm/asm_eval.py create mode 100644 atk16_asm/asm_ops.py create mode 100644 atk16_asm/asm_pass0.py create mode 100644 atk16_asm/asm_pass1.py create mode 100644 atk16_asm/asm_pass2.py create mode 100644 atk16_asm/asm_pass3.py create mode 100644 atk16_asm/asm_pass4.py create mode 100755 atk16_asm/assembler.py create mode 100644 atk16_asm/optimizer.py create mode 100644 atk16_asm/tokenizer.py create mode 100644 atk16_ast_walking_compiler/compiler.py create mode 100644 atk16_bytecode_compiler/bytecode_compiler.py create mode 100644 atk16_syntax/README.md create mode 100644 atk16_syntax/atk16-syntax-0.0.1.vsix create mode 100644 atk16_syntax/extension.js create mode 100644 atk16_syntax/language-configuration.json create mode 100644 atk16_syntax/package.json create mode 100644 atk16_syntax/syntaxes/atk16.tmLanguage.json create mode 100644 atk16_utils/charmem.py create mode 100644 atk16_utils/convert_ttf.py create mode 100644 atk16_utils/dig_install.py create mode 100644 atk16_utils/pad_bin.py create mode 100755 atk16_utils/ucode.py delete mode 100644 digital-diagrams/atk16.dig delete mode 100644 digital-diagrams/atk16_alu.dig delete mode 100644 digital-diagrams/atk16_alu_carryfix.dig delete mode 100644 digital-diagrams/atk16_alu_fo.dig delete mode 100644 digital-diagrams/atk16_alu_fz.dig delete mode 100644 digital-diagrams/atk16_alu_inputs.dig delete mode 100644 digital-diagrams/atk16_decoder.dig delete mode 100644 digital-diagrams/atk16_graphics_mode.dig delete mode 100644 digital-diagrams/atk16_irc.dig delete mode 100644 digital-diagrams/atk16_jump_unit.dig delete mode 100644 digital-diagrams/atk16_mem.dig delete mode 100644 digital-diagrams/atk16_mem_mux.dig delete mode 100644 digital-diagrams/atk16_peripherals.dig delete mode 100644 digital-diagrams/atk16_ppu.dig delete mode 100644 digital-diagrams/atk16_ppu_palette.dig delete mode 100644 digital-diagrams/atk16_ppu_sprite_eval.dig delete mode 100644 digital-diagrams/atk16_regbank.dig delete mode 100644 digital-diagrams/atk16_tpu.dig delete mode 100644 digital-diagrams/atk16_ucode_addr.dig delete mode 100644 digital-diagrams/atk16_vga_sync.dig create mode 100644 digital_diagrams/atk16.dig create mode 100644 digital_diagrams/atk16_alu.dig create mode 100644 digital_diagrams/atk16_alu_carryfix.dig create mode 100644 digital_diagrams/atk16_alu_fo.dig create mode 100644 digital_diagrams/atk16_alu_fz.dig create mode 100644 digital_diagrams/atk16_alu_inputs.dig create mode 100644 digital_diagrams/atk16_decoder.dig create mode 100644 digital_diagrams/atk16_graphics_mode.dig create mode 100644 digital_diagrams/atk16_irc.dig create mode 100644 digital_diagrams/atk16_jump_unit.dig create mode 100644 digital_diagrams/atk16_mem.dig create mode 100644 digital_diagrams/atk16_mem_mux.dig create mode 100644 digital_diagrams/atk16_peripherals.dig create mode 100644 digital_diagrams/atk16_ppu.dig create mode 100644 digital_diagrams/atk16_ppu_palette.dig create mode 100644 digital_diagrams/atk16_ppu_sprite_eval.dig create mode 100644 digital_diagrams/atk16_regbank.dig create mode 100644 digital_diagrams/atk16_tpu.dig create mode 100644 digital_diagrams/atk16_ucode_addr.dig create mode 100644 digital_diagrams/atk16_vga_sync.dig diff --git a/Makefile b/Makefile index 8658fe1..00973b7 100644 --- a/Makefile +++ b/Makefile @@ -8,39 +8,39 @@ start-digital: # make assemble asm=src/program.atk16 out=out/program.bin assemble: - $(py) atk16-asm/assembler.py $(asm) $(out) + $(py) atk16_asm/assembler.py $(asm) $(out) # make gen-ucode out=out/ucode.bin gen-ucode: - $(py) atk16-utils/ucode.py $(out) + $(py) atk16_utils/ucode.py $(out) # make gen-charmem out=out/charmem.bin gen-charmem: - $(py) atk16-utils/charmem.py $(out) + $(py) atk16_utils/charmem.py $(out) # make convert-ttf in=font.ttf out=charset.txt convert-ttf: - $(py) atk16-utils/convert_ttf.py $(in) $(out) + $(py) atk16_utils/convert_ttf.py $(in) $(out) # make dig-install bin=out/program.bin dig=digital/atk16_mem.dig label=MEM_ROM dig-install: - $(py) atk16-utils/dig_install.py $(bin) $(dig) $(label) + $(py) atk16_utils/dig_install.py $(bin) $(dig) $(label) # make ast-compile in=asm/test_py_src.py out=asm/test_py_src.atk16 ast-compile: - $(py) atk16-ast-walking-compiler/compiler.py $(in) $(out) + $(py) atk16_ast_walking_compiler/compiler.py $(in) $(out) # make bytecode-compile in=asm/test_py_src.py out=asm/test_py_src.atk16 bytecode-compile: - $(py) atk16-bytecode-compiler/compiler.py $(in) $(out) + $(py) atk16_bytecode_compiler/compiler.py $(in) $(out) # make emu in=rom.bin emu: - $(py) atk16-emu/cli.py $(in) + $(py) atk16_emu/cli.py $(in) # make test test: - $(py) atk16-asm/test_alu.py digital-diagrams/atk16_alu.dig + $(py) atk16_asm/test_alu.py digital_diagrams/atk16_alu.dig run-single-test: java -cp $(digital_path) CLI test -verbose -circ $(circ) -tests $(tests) diff --git a/atk16-asm/asm_eval.py b/atk16-asm/asm_eval.py deleted file mode 100644 index c05fc03..0000000 --- a/atk16-asm/asm_eval.py +++ /dev/null @@ -1,47 +0,0 @@ -constants: dict[str, str] = { - # Registers - "ra": "0", - "rb": "1", - "rc": "2", - "rd": "3", - "re": "4", - "rf": "5", - "rg": "6", - "rh": "7", - # ALU instructions - "al_plus": "0", - "al_minus": "1", - "al_and": "2", - "al_or": "3", - "al_xor": "4", - "al_slr": "5", - "al_sar": "6", - "al_sll": "7", - # ALU flags - "carry": "0", - "overflow": "1", - "zero": "2", - "sign": "3", -} - -Symbols = dict[str, int] - -def check_size(bits: int, val: int) -> None: - if val >= 2 ** bits: - raise Exception(f"Value does not fit in {bits} bits: 0x{val:>04x}") - -def eval_symbol(symbols: Symbols, c: str) -> str: - if c in symbols: - return str(symbols[c]) - - if c in constants: - return constants[c] - - return c - -def eval_expr(symbols: Symbols, expr: str, bits: int = 16) -> int: - expr = expr.lower() - expr = eval_symbol(symbols, expr) - ret = eval(expr, symbols.copy()) # eval as Python expr - check_size(bits, ret) - return ret diff --git a/atk16-asm/asm_ops.py b/atk16-asm/asm_ops.py deleted file mode 100644 index 885c275..0000000 --- a/atk16-asm/asm_ops.py +++ /dev/null @@ -1,154 +0,0 @@ -from typing import Callable -from asm_eval import * -from dataclasses import dataclass - -@dataclass -class Meta: - address: int - -def make_alr(meta: Meta, symbols: Symbols, alu_op: str, left: str, right: str, target: str) -> int: - """ALR 0000 TTTL LLRR RSSS""" - target_e = eval_expr(symbols, target, bits=3) - left_e = eval_expr(symbols, left, bits=3) - right_e = eval_expr(symbols, right, bits=3) - alu_op_e = eval_expr(symbols, alu_op, bits=3) - word = (0b0000 << 12) + \ - (target_e << 9) + \ - (left_e << 6) + \ - (right_e << 3) + \ - alu_op_e - return word - -def make_ali(meta: Meta, symbols: Symbols, alu_op: str, left: str, imm: str, target: str) -> int: - """ALI 0001 TTTL LLII ISSS""" - target_e = eval_expr(symbols, target, bits=3) - left_e = eval_expr(symbols, left, bits=3) - imm_e = eval_expr(symbols, imm, bits=3) - alu_op_e = eval_expr(symbols, alu_op, bits=3) - word = (0b0001 << 12) + \ - (target_e << 9) + \ - (left_e << 6) + \ - (imm_e << 3) + \ - alu_op_e - return word - -def make_ldr(meta: Meta, symbols: Symbols, addr_reg: str, to_reg: str) -> int: - """LDR 0010 TTTR RRXX XXXX""" - to_reg_e = eval_expr(symbols, to_reg, bits=3) - addr_reg_e = eval_expr(symbols, addr_reg, bits=3) - word = (0b0010 << 12) + \ - (to_reg_e << 9) + \ - (addr_reg_e << 6) - return word - -def make_str(meta: Meta, symbols: Symbols, from_reg: str, addr_reg: str) -> int: - """STR 0011 XXXL LLRR RXXX""" - from_reg_e = eval_expr(symbols, from_reg, bits=3) - addr_reg_e = eval_expr(symbols, addr_reg, bits=3) - word = (0b0011 << 12) + \ - (addr_reg_e << 6) + \ - (from_reg_e << 3) - return word - -def make_ldi(meta: Meta, symbols: Symbols, imm: str, to_reg: str) -> int: - """LDI 0100 TTTI IIII IIII""" - to_reg_e = eval_expr(symbols, to_reg, bits=3) - imm_e = eval_expr(symbols, imm, bits=9) - word = (0b0100 << 12) + \ - (to_reg_e << 9) + \ - imm_e - return word - -def make_jpr(meta: Meta, symbols: Symbols, addr_reg: str) -> int: - """JPR 0101 XXXR RRXX XXXX""" - addr_reg_e = eval_expr(symbols, addr_reg, bits=3) - word = (0b0101 << 12) + \ - (addr_reg_e << 6) - return word - -def make_jpi(meta: Meta, symbols: Symbols, imm: str) -> int: - """JPI 0110 XXXI IIII IIII""" - imm_e = eval_expr(symbols, imm, bits=9) - imm_e = imm_e - meta.address - 1 - imm_e = imm_e & (0b111111111) - #print("symbols:", symbols) - #print(meta, imm, f"0x{imm_e:>0x}") - word = (0b0110 << 12) + \ - imm_e - return word - -def make_brr(meta: Meta, symbols: Symbols, flag_s: str, addr_reg: str) -> int: - """brr 0111 XFFR RRXX XXXX""" - flag_s_e = eval_expr(symbols, flag_s, bits=2) - addr_reg_e = eval_expr(symbols, addr_reg, bits=3) - word = (0b0111 << 12) + \ - (flag_s_e << 9) + \ - (addr_reg_e << 6) - return word - -def make_bri(meta: Meta, symbols: Symbols, flag_s: str, imm: str) -> int: - """BRI 1000 XFFI IIII IIII""" - flag_s_e = eval_expr(symbols, flag_s, bits=2) - imm_e = eval_expr(symbols, imm, bits=9) - imm_e = imm_e - meta.address - 1 - imm_e = imm_e & (0b111111111) - word = (0b1000 << 12) + \ - (flag_s_e << 9) + \ - imm_e - return word - -def make_lpc(meta: Meta, symbols: Symbols, target: str) -> int: - """LPC 1001 TTTX XXXX XXXX""" - target_e = eval_expr(symbols, target, bits=3) - word = (0b1001 << 12) + \ - (target_e << 9) - return word - -def make_rti(meta: Meta, symbols: Symbols) -> int: - """RTI 1110 XXXX XXXX XXXX""" - word = (0b1110 << 12) - return word - -def make_hlt(meta: Meta, symbols: Symbols) -> int: - """HLT 1111 XXXX XXXX XXXX""" - word = (0b1111 << 12) - return word - -OpWordDict = dict[str, Callable[..., int]] -operations: OpWordDict = { - "alr": make_alr, - "ali": make_ali, - "ldr": make_ldr, - "str": make_str, - "ldi": make_ldi, - "jpr": make_jpr, - "jpi": make_jpi, - "brr": make_brr, - "bri": make_bri, - "lpc": make_lpc, - "rti": make_rti, - "hlt": make_hlt, -} - -ExpandResult = list[list[str]] -ExpandFn = Callable[..., ExpandResult] -OpExpansionDict = dict[str, ExpandFn] - -def expand_id(*parts: str) -> ExpandResult: - return [list(parts)] - -default_expansions: OpExpansionDict = { - "alr": lambda *args: expand_id("alr", *args), - "ali": lambda *args: expand_id("ali", *args), - "ldr": lambda *args: expand_id("ldr", *args), - "str": lambda *args: expand_id("str", *args), - "ldi": lambda *args: expand_id("ldi", *args), - "jpr": lambda *args: expand_id("jpr", *args), - "jpi": lambda *args: expand_id("jpi", *args), - "brr": lambda *args: expand_id("brr", *args), - "bri": lambda *args: expand_id("bri", *args), - "lpc": lambda *args: expand_id("lpc", *args), - "rti": lambda *args: expand_id("rti", *args), - "hlt": lambda *args: expand_id("hlt", *args), -} - diff --git a/atk16-asm/asm_pass0.py b/atk16-asm/asm_pass0.py deleted file mode 100644 index f5b6b0b..0000000 --- a/atk16-asm/asm_pass0.py +++ /dev/null @@ -1,50 +0,0 @@ -from dataclasses import dataclass -import os.path -from asm_ops import * -from asm_eval import * -from tokenizer import * - -@dataclass -class Result0Line: - line_num: int - src_file: str - line: str - -@dataclass -class Result0: - lines: list[Result0Line] - -def pass_0(lines: list[str], file_name: str) -> Result0: - result_lines: list[Result0Line] = [] - - for (line_num, line) in enumerate(lines): - line = line.split(";")[0].strip() - if line == "": continue - - keyword, *args = tokenize(line) - - match keyword: - case "@include": - asm_file_name = args[0] - path = os.path.join(os.path.dirname(file_name), asm_file_name + ".atk16") - with open(path, "r") as f: - incl_lines = f.readlines() - - incl_result0 = pass_0(incl_lines, asm_file_name) - for incl_line in incl_result0.lines: - result_lines.append(Result0Line( - src_file=incl_line.src_file, - line_num=incl_line.line_num, - line=incl_line.line - )) - - case _: - result_lines.append(Result0Line( - src_file=file_name, - line_num=line_num, - line=line - )) - - return Result0( - lines=result_lines - ) diff --git a/atk16-asm/asm_pass1.py b/atk16-asm/asm_pass1.py deleted file mode 100644 index 0b06738..0000000 --- a/atk16-asm/asm_pass1.py +++ /dev/null @@ -1,48 +0,0 @@ -import importlib -import sys -import os.path -from dataclasses import dataclass -from asm_ops import * -from asm_eval import * -from asm_pass0 import * -from tokenizer import tokenize - -@dataclass -class Result1Line: - line_num: int - src_file: str - parts: list[str] - -@dataclass -class Result1: - lines: list[Result1Line] - operations: OpExpansionDict - -def pass_1(result0: Result0) -> Result1: - result_lines: list[Result1Line] = [] - operations: OpExpansionDict = default_expansions.copy() - - for line in result0.lines: - keyword, *args = tokenize(line.line) - match keyword: - case "@use": - module_name, ops = args[0].split(":") - ops_split = ops.split(",") - sys.path.append(os.path.dirname(line.src_file)) - module = importlib.import_module(module_name) - mod_expansions: OpExpansionDict = module.expansions - for op in mod_expansions: - expansion = mod_expansions[op] - if ops == "*" or op in ops_split: - operations[op] = expansion - case _: - result_lines.append(Result1Line( - src_file=line.src_file, - line_num=line.line_num, - parts=[keyword, *args] - )) - - return Result1( - operations=operations, - lines=result_lines - ) diff --git a/atk16-asm/asm_pass2.py b/atk16-asm/asm_pass2.py deleted file mode 100644 index e2ad4ec..0000000 --- a/atk16-asm/asm_pass2.py +++ /dev/null @@ -1,40 +0,0 @@ -from dataclasses import dataclass -from asm_ops import * -from asm_eval import * -from asm_pass1 import * - -@dataclass -class Result2Line: - line_num: int - src_file: str - parts: list[str] - original_parts: list[str] - -@dataclass -class Result2: - lines: list[Result2Line] - operations: OpExpansionDict - -def pass_2(result1: Result1) -> Result2: - result_lines: list[Result2Line] = [] - - for line in result1.lines: - keyword, *args = line.parts - if keyword in result1.operations: - fn = result1.operations[keyword] - output: list[list[str]] = fn(*args) - else: - output = [line.parts] - - for (idx, parts) in enumerate(output): - result_lines.append(Result2Line( - line_num=line.line_num, - src_file=line.src_file, - parts=parts, - original_parts=line.parts if idx == 0 else ["..."] - )) - - return Result2( - operations=result1.operations, - lines=result_lines - ) diff --git a/atk16-asm/asm_pass3.py b/atk16-asm/asm_pass3.py deleted file mode 100644 index 9c8cb34..0000000 --- a/atk16-asm/asm_pass3.py +++ /dev/null @@ -1,78 +0,0 @@ -from dataclasses import dataclass -from asm_ops import * -from asm_eval import * -from asm_pass2 import * - -@dataclass -class Result3Line: - line_num: int - src_file: str - address: int - parts: list[str] - original_parts: list[str] - -@dataclass -class Result3: - lines: list[Result3Line] - operations: OpExpansionDict - symbols: dict[str, int] - -def pass_3(result2: Result2) -> Result3: - result_lines: list[Result3Line] = [] - symbols: dict[str, int] = {} - address = 0 - - for line in result2.lines: - keyword, *args = line.parts - match keyword: - case "@address": - address = eval_expr(symbols, args[0]) - continue - case "@label": - label = args[0] - if label in symbols: - raise Exception(f"When defining label {label} as {address:>04x}, symbol {label} already defined as {symbols[label]:>04x}") - symbols[args[0]] = address - continue - case "@let": - symbols[args[0]] = eval_expr(symbols, args[1]) - continue - case _: - result_lines.append(Result3Line( - line_num=line.line_num, - src_file=line.src_file, - parts=line.parts, - address=address, - original_parts=line.original_parts, - )) - address += 1 - - result_lines.sort(key=lambda l: l.address) - for result_line in result_lines: - rows_with_same_addr = list(filter(lambda l: l.address == result_line.address, result_lines)) - n = len(rows_with_same_addr) - if n > 1: - formatted = format_overlapping_rows(rows_with_same_addr) - raise Exception(f"Overlapping segments: address 0x{result_line.address:>04x} has conflicting definitions:\n{formatted}") - return Result3( - operations=result2.operations, - lines=result_lines, - symbols=symbols, - ) - -def format_overlapping_rows(rows: list[Result3Line]) -> str: - longest_val = 0 - for row in rows: - joined = " ".join(row.parts) - if len(joined) > longest_val: - longest_val = len(joined) - - first_col_width = longest_val + 4 - - results: list[str] = [] - for row in rows: - joined = " ".join(row.parts) - result = joined + (first_col_width - len(joined)) * " " + f" ({row.src_file}:{row.line_num})" - results.append(result) - - return "\n".join(results) diff --git a/atk16-asm/asm_pass4.py b/atk16-asm/asm_pass4.py deleted file mode 100644 index 2fff870..0000000 --- a/atk16-asm/asm_pass4.py +++ /dev/null @@ -1,61 +0,0 @@ -from dataclasses import dataclass -from asm_ops import * -from asm_eval import * -from asm_pass3 import * - -@dataclass -class Result4Line: - line_num: int - src_file: str - address: int - word: int - text: str - original_text: str - -@dataclass -class Result4: - lines: list[Result4Line] - operations: OpExpansionDict - symbols: dict[str, int] - -def pass_4(result3: Result3) -> Result4: - result_lines: list[Result4Line] = [] - - for line in result3.lines: - keyword, *args = line.parts - meta = Meta( - address=line.address, - ) - - text = " ".join([keyword, *args]) - original_text = " ".join(line.original_parts) - - if keyword in operations: - fn = operations[keyword] - word = fn(meta, result3.symbols, *args) - result_lines.append(Result4Line( - line_num=line.line_num, - src_file=line.src_file, - address=line.address, - word=word, - text=text, - original_text=original_text, - )) - else: - try: - result_lines.append(Result4Line( - line_num=line.line_num, - src_file=line.src_file, - address=line.address, - word=eval_expr(result3.symbols, keyword), - text=text, - original_text=original_text, - )) - except: - raise Exception(f"Invalid assembly at {line.src_file}:{line.line_num + 1}\n\n{line}") - - return Result4( - operations=result3.operations, - symbols=result3.symbols, - lines=result_lines, - ) diff --git a/atk16-asm/assembler.py b/atk16-asm/assembler.py deleted file mode 100755 index c678ba0..0000000 --- a/atk16-asm/assembler.py +++ /dev/null @@ -1,82 +0,0 @@ -#!/usr/bin/env python3 -# Assemble ATK16 assembly to bytecode - -import sys -from asm_ops import * -from asm_eval import * -from asm_pass0 import pass_0 -from asm_pass1 import pass_1 -from asm_pass2 import pass_2 -from asm_pass3 import pass_3 -from asm_pass4 import pass_4 - -if len(sys.argv) != 3: - print("usage: assembler.py # read from file") - print(" assembler.py - # read from stdin") - sys.exit(1) - -infile_path = sys.argv[1] -outfile_path = sys.argv[2] - -src = "" -if (infile_path == "-"): - for line in sys.stdin: - src += line -else: - with open(infile_path, "r") as f: - src = f.read() - -src_lines = src.splitlines() - -### Utils - -def parse(line: str) -> list[str]: - depth = 0 - result: list[str] = [] - acc: str = "" - for c in line: - if c.isspace() and depth == 0: - result.append(acc) - acc = "" - elif c == "(": - depth += 1 - acc += "(" - elif c == ")": - depth -= 1 - acc += ")" - else: - acc += c - - result.append(acc) - return list(filter(lambda x: len(x) > 0, result)) - -result0 = pass_0(src_lines, infile_path) -result1 = pass_1(result0) -result2 = pass_2(result1) -result3 = pass_3(result2) -result4 = pass_4(result3) - -nop = bytearray([0b1000_0000, 0]) -result = bytearray() -# initially one nop -result.extend(nop) - -for line in result4.lines: - for (symbol, symbol_value) in result4.symbols.items(): - if line.address == symbol_value: - print(f"{symbol}:") - - if len(result) < 2 * line.address + 1: - result.extend((2 * line.address + 1 - len(result)) * nop) - - out_line = f"{line.address:>08x} 0x{line.word:>04x} {line.text}" - out_spaces_n = (42 - len(out_line)) - out_spaces = out_spaces_n * " " if out_spaces_n > 0 else 4 * " " - print(f"{out_line}{out_spaces}{line.original_text}") - result[2 * line.address + 0] = ((line.word >> 8) & 0xff) - result[2 * line.address + 1] = ((line.word >> 0) & 0xff) - -with open(outfile_path, "wb") as f: - f.write(result) - -print(f"Wrote {len(result)} bytes to {outfile_path}") diff --git a/atk16-asm/optimizer.py b/atk16-asm/optimizer.py deleted file mode 100644 index 0ee2837..0000000 --- a/atk16-asm/optimizer.py +++ /dev/null @@ -1,189 +0,0 @@ -from tokenizer import tokenize - -def format_asm_row(asm: str) -> str: - if not (asm.startswith("@") or asm.startswith(";")) and not asm.startswith(" ") and len(asm) > 0: - return " " + asm - else: - return asm - -class Optimizer: - def __init__(self): - pass - - def optimize(self, asm_str: str): - asm = asm_str.split("\n") - asm = [row.strip() for row in asm] - asm = [self.strip_comment(row) for row in asm] - asm = [row for row in asm if not len(row) == 0] - asm = [tokenize(row, retain_curlies=True) for row in asm] - asm = self.compact_spu_spo_pattern(asm) - - # TODO: not safe when setting loading SP and FP - # ldr RA SP - # mov RA FP - # gets optimized to - # ldr RA FP - #asm = self.compact_target_mov_pattern(asm) - #asm = self.compact_target_mov_pattern(asm) - - # TODO: not safe at all. E.g. breaks a while True: pass loop - #asm = self.compact_mov_source_pattern(asm) - #asm = self.compact_mov_source_pattern(asm) - - asm = self.compact_spu_load_spo_pattern(asm) - # asm = self.convert_alr_to_ali(asm) - result = "\n".join([format_asm_row(" ".join(row)) for row in asm]) - - return result - - def strip_comment(self, row: str): - ret: str = "" - for c in row: - if c == ";": break - ret += c - - return ret - - def compact_spu_spo_pattern(self, asm: list[list[str]]) -> list[list[str]]: - i = 0 - result: list[list[str]] = [] - while i < len(asm): - current = asm[i] - next = asm[i + 1] if i + 1 < len(asm) else None - i += 1 - if current[0].startswith("@") or next is None: - result.append(current) - continue - - if current[0] == "spu" and next[0] == "spo": - print("=== compact_spu_spo_pattern") - print(current) - print(next) - - arg_current = current[1] - arg_next = next[1] - - print("=== arg_current:", arg_current) - print("=== arg_next:", arg_next) - - if arg_current == arg_next: - print("=== pass") - pass # remove both spu and spo - else: - print("=== mov") - mov = ["mov", arg_current, arg_next] - result.append(mov) - print("=== mov:", mov) - - print("=== last of result:", result[len(result) - 1]) - print() - i += 1 - continue - - result.append(current) - - return result - - def compact_target_mov_pattern(self, asm: list[list[str]]) -> list[list[str]]: - ops_with_target = ["ldi", "ldr", "add", "sub", "addi", "subi", "and", "or", "xor", "sll", "slr", "sar", "slli", "slri", "sari", "inc", "dec", "mov", "ali", "alr", "lpc"] - i = 0 - result: list[list[str]] = [] - while i < len(asm): - current = asm[i] - next = asm[i + 1] if i + 1 < len(asm) else None - i += 1 - if current[0].startswith("@") or next is None: - result.append(current) - continue - - if current[0] in ops_with_target and next[0] == "mov": - - op_op, op_operands, op_target_reg = current[0], current[1:len(current) - 1], current[len(current) - 1] - mov_from_reg, mov_to_reg = next[1], next[2] - - if op_target_reg == mov_from_reg: - ret = [op_op, *op_operands, mov_to_reg] - result.append(ret) - i += 1 - continue - - result.append(current) - - return result - - def compact_mov_source_pattern(self, asm: list[list[str]]) -> list[list[str]]: - ops_with_source = ["str", "ldr", "add", "sub", "addi", "subi", "and", "or", "xor", "sll", "slr", "sar", "slli", "slri", "sari", "mov", "ali", "alr"] - i = 0 - result: list[list[str]] = [] - while i < len(asm): - current = asm[i] - next = asm[i + 1] if i + 1 < len(asm) else None - i += 1 - if current[0].startswith("@") or next is None: - result.append(current) - continue - - if current[0] == "mov" and next[0] in ops_with_source: - mov_from_reg, mov_to_reg = current[1], current[2] - op_op, op_source_reg, op_operands = next[0], next[1], next[2:] - - if op_source_reg == mov_to_reg: - ret = [op_op, op_source_reg, *op_operands] - result.append(ret) - i += 1 - continue - - result.append(current) - - return result - - def compact_spu_load_spo_pattern(self, asm: list[list[str]]) -> list[list[str]]: - # spu RA - # ldi int_7 RA - # ldr RA RB - # spo RA - # OR - # spu RA - # ldi 3 RB - # spo RA - - i = 0 - result: list[list[str]] = [] - while i < len(asm): - instr0 = asm[i] - instr1 = asm[i + 1] if i + 1 < len(asm) else None - instr2 = asm[i + 2] if i + 2 < len(asm) else None - instr3 = asm[i + 3] if i + 3 < len(asm) else None - i += 1 - if instr0[0].startswith("@") or instr1 is None or instr2 is None or instr3 is None: - result.append(instr0) - continue - - if instr0[0] == "spu" and instr1[0] == "ldi" and instr2[0] == "ldr" and instr3[0] == "spo": - spu_op, spu_reg = instr0 - ldi_op, ldi_imm, ldi_target_reg = instr1 - ldr_op, ldr_from_reg, ldr_to_reg = instr2 - spo_op, spo_reg = instr3 - - if spu_reg == spo_reg and ldi_target_reg == ldr_from_reg and ldr_from_reg != ldr_to_reg: - ret0 = f"ldi {ldi_imm} {ldr_to_reg}".split() - ret1 = f"ldr {ldr_to_reg} {ldr_to_reg}".split() - result.append(ret0) - result.append(ret1) - i += 3 - continue - - elif instr0[0] == "spu" and instr1[0] == "ldi" and instr2[0] == "spo": - spu_op, spu_reg = instr0 - ldi_op, ldi_imm, ldi_target_reg = instr1 - spo_op, spo_reg = instr2 - - if spu_reg == spo_reg and ldi_target_reg != spu_reg: - ret0 = f"ldi {ldi_imm} {ldi_target_reg}".split() - result.append(ret0) - i += 2 - continue - - result.append(instr0) - - return result diff --git a/atk16-asm/tokenizer.py b/atk16-asm/tokenizer.py deleted file mode 100644 index cf31b56..0000000 --- a/atk16-asm/tokenizer.py +++ /dev/null @@ -1,47 +0,0 @@ -def tokenize(line: str, retain_curlies = False) -> list[str]: - cur: str = "" - result: list[str] = [] - is_py_expr = False - is_string = False - idx = 0 - while idx < len(line): - c = line[idx] - if not is_py_expr and c == "$": - is_py_expr = True - if retain_curlies: - cur += "${" - idx += 1 - elif is_py_expr and c == "$": - raise Exception("Unexpected start of python expr while already parsing a python expression:\n" + line) - elif not is_py_expr and c == "}": - raise Exception("Unexpected end of python expr while not parsing a python expression:\n" + line) - elif is_py_expr and c == "}": - is_py_expr = False - if retain_curlies: - cur += c - result.append(cur) - cur = "" - elif is_py_expr: - cur += c - elif not is_string and c == "\"": - cur += "\"" - is_string = True - elif is_string and c == "\"": - cur += "\"" - is_string = False - result.append(cur) - cur = "" - elif is_string: - cur += c - elif c == " " or c == "\t": - result.append(cur) - cur = "" - else: - cur += c - - idx += 1 - - if len(cur) > 0: - result.append(cur) - - return [r for r in result if r != ""] \ No newline at end of file diff --git a/atk16-ast-walking-compiler/compiler.py b/atk16-ast-walking-compiler/compiler.py deleted file mode 100644 index 1634bed..0000000 --- a/atk16-ast-walking-compiler/compiler.py +++ /dev/null @@ -1,716 +0,0 @@ -#!/usr/bin/env python3 -# Generate .atk16 assembly from a subset of Python - -import sys -import ast - -from dataclasses import dataclass -from typing import Literal, Set, cast, Any, TypeAlias, TypeVar -from collections import OrderedDict - - -if len(sys.argv) != 3: - print("usage: compiler.py ") - sys.exit(1) - -infile_path = sys.argv[1] -outfile_path = sys.argv[2] - -Label = str -StackOffset = int -RegChar = Literal["A", "B", "C", "D", "E", "F", "G", "H"] - -@dataclass -class Reg(): - reg: RegChar - - def __str__(self): - return f"R{self.reg}" - -ALL_REGS: list[RegChar] = ["A", "B", "C", "D", "E", "F", "G", "H"] -FRAME_POINTER_REG_CHAR: RegChar = "G" # points to base of stack frame -FRAME_POINTER_REG = Reg(FRAME_POINTER_REG_CHAR) -STACK_POINTER_REG_CHAR: RegChar = "H" -STACK_POINTER_REG = Reg(STACK_POINTER_REG_CHAR) -SPECIAL_REGS: list[RegChar] = [FRAME_POINTER_REG_CHAR, STACK_POINTER_REG_CHAR] -GENERIC_REGS: OrderedDict[RegChar, None] = OrderedDict() -for char in ALL_REGS: - if char not in SPECIAL_REGS: - GENERIC_REGS[cast(RegChar, char)] = None - -def format_asm_row(asm: str) -> str: - if not (asm.startswith("@") or asm.startswith(";")) and not asm.startswith(" ") and len(asm) > 0: - return " " + asm - else: - return asm - -class Compiler(ast.NodeVisitor): - def __init__(self): - self.const_asm: list[str] = [] - self.program_asm: list[str] = [ - "@label main" - ] - self.function_def_asms: list[str] = [] - self.currently_emitting_asm_list = self.program_asm - - self.local_bindings: dict[str, StackOffset] = {} - self.const_bindings: dict[str, Label] = {} - - self.unique_name_counter = 0 - self.latest_break_target: Label | None = None - - self.reserved_regs: OrderedDict[RegChar, None] = OrderedDict() - - def get_unique_name(self, prefix: str): - ret = f"{prefix}_{self.unique_name_counter}" - self.unique_name_counter += 1 - return ret - - def assign_const(self, name: str, value: int): - prev_currently_emitting_asm_list = self.currently_emitting_asm_list - self.currently_emitting_asm_list = self.const_asm - - self.emit_label(name) - self.emit(f"{value}") - - self.const_bindings[name] = name - - self.currently_emitting_asm_list = prev_currently_emitting_asm_list - - def emit(self, asm: str): - asm = asm.strip() - asm = format_asm_row(asm) - - self.currently_emitting_asm_list.append(asm) - - def emit_label(self, label_name: str): - label_name = label_name.lower() - self.emit(f"@label {label_name}") - - def alloc_reg(self) -> Reg: - for reg in GENERIC_REGS: - if not reg in self.reserved_regs: - self.reserved_regs[reg] = None - return Reg(reg) - - raise Exception("Ran out of registers, TODO use stack") - - def free_reg(self, reg: Reg): - self.reserved_regs.pop(reg.reg) - - class RegContextManager: - def __init__(self, compiler): - self.compiler = compiler - - def __enter__(self) -> Reg: - self.reg = self.compiler.alloc_reg() - return self.reg - - def __exit__(self, exc_type, exc_value, exc_tb): - self.compiler.free_reg(self.reg) - - def allocated_reg(self): - return Compiler.RegContextManager(self) - - def compile(self, bootstrap_asm: str, source: str) -> str: - tree = ast.parse(source) - print(ast.dump(tree, indent=4)) - self.visit(tree) - return "\n".join([ - bootstrap_asm, - "", - "\n".join(self.const_asm), - "", - "\n".join(self.function_def_asms), - "", - "\n".join(self.program_asm), - "" - ]) - - def generic_visit(self, node: ast.AST) -> Any: - raise NotImplementedError(f"type {type(node)}, value: {node}") - - def emit_builtin_call(self, name: str, args: list[ast.expr]): - self.emit(f"; Builtin call {name} {args}") - match name: - case "asm": - match args: - case [ast.Constant(str(value))]: - self.emit(value) - - # return None - with self.allocated_reg() as arg: - self.emit(f"ldi 0 {arg}") - self.emit(f"spu {arg}") - - case other: raise Exception(f"asm: invalid args: {other}") - - case "store": - if len(args) != 2: - raise Exception("Invalid number of arguments to store: " + str(len(args))) - - # Evaluate args before call - for arg in args: - self.visit(arg) - - with self.allocated_reg() as arg1, self.allocated_reg() as arg2: - self.emit(f"spo {arg2}") - self.emit(f"spo {arg1}") - self.emit(f"str {arg2} {arg1}") - - # return None - self.emit(f"ldi 0 {arg1}") - self.emit(f"spu {arg1}") - - case "load": - if len(args) != 1: - raise Exception("Invalid number of arguments to load: " + str(len(args))) - - self.visit(args[0]) - - self.emit("; (load) dereferencing top of stack") - with self.allocated_reg() as arg: - self.emit(f"spo {arg}") - self.emit(f"ldr {arg} {arg}") - self.emit(f"spu {arg}") - - case "ord": - if len(args) != 1: - raise Exception("Invalid number of arguments to ord: " + str(len(args))) - - self.visit(args[0]) - - case other: - raise Exception(f"Unknown builtin: {other}") - - def eval_int_constant_and_spu(self, value: int): - with self.allocated_reg() as reg: - if value >= 0 and value < 8: - self.emit(f"ldi {value} {reg}") - else: - name = self.get_unique_name("int") - self.assign_const(name, value) - self.emit(f"ldi {name} {reg}") - self.emit(f"ldr {reg} {reg} ; {name} = {value}") - - self.emit(f"spu {reg}") - - def emit_add_imm(self, reg1: str, addend: int, target_reg: str): - if addend >= 0 and addend < 8: - self.emit(f"addi {reg1} {addend} {target_reg}") - else: - name = self.get_unique_name("int") - self.assign_const(name, addend) - - with self.allocated_reg() as addend_reg: - self.emit(f"ldi {name} {addend_reg}") - self.emit(f"ldr {addend_reg} {addend_reg}") - self.emit(f"add {reg1} {addend_reg} {target_reg}") - - def visit_Module(self, node: ast.Module): - stmts = node.body - frame_names = self.collect_local_variables(stmts) - - self.emit("; stack frame with offsets") - for offset, name in enumerate(frame_names): - self.local_bindings[name] = offset - self.emit(f"; {name} {offset}") - - self.emit_add_imm("SP", len(frame_names), "SP") - - for stmt in stmts: - if type(stmt) == ast.Expr and type(stmt.value) != ast.Call: - self.emit("; NOP top-level expression") - continue - - self.visit(stmt) - - self.emit(f"mov FP SP") - self.emit("hlt") - - def visit_Expr(self, expr: ast.Expr): - self.visit(expr.value) - - with self.allocated_reg() as reg: - self.emit("; popping free-standing Expr result from stack") - self.emit(f"spo {reg}") - - def visit_UnaryOp(self, node: ast.UnaryOp): - self.emit(f"; {node.op}") - self.visit(node.operand) - match node.op: - case ast.Not(): - with self.allocated_reg() as reg1, self.allocated_reg() as reg2: - self.emit(f"spo {reg1}") - self.emit(f"ldi 1 {reg2}") - self.emit(f"andi {reg1} 1 {reg1}") - self.emit(f"xor {reg1} {reg2} {reg1}") - self.emit(f"spu {reg1}") - - case ast.Invert(): # aka bitwise not - with self.allocated_reg() as reg1: - self.emit(f"spo {reg1}") - self.emit(f"not {reg1}") - self.emit(f"spu {reg1}") - - case ast.UAdd(): # +a - pass # nop - - case ast.USub(): # -a - with self.allocated_reg() as reg1: - self.emit(f"spo {reg1}") - self.emit(f"not {reg1}") - self.emit(f"addi {reg1} 1 {reg1}") - self.emit(f"spu {reg1}") - - case other: - raise NotImplementedError(f"Unhandled UnaryOp: {other}") - - def visit_BoolOp(self, node: ast.BoolOp): - self.emit(f"; {node.op}") - - match node.op: - case ast.And(): - label_short_circuit = self.get_unique_name("And_short_circuit") - - with self.allocated_reg() as reg: - for arg in node.values: - self.emit(f"; And operand {arg}") - self.visit(arg) - - self.emit(f"spo {reg}") - self.emit(f"addi {reg} 0 {reg}") - self.emit(f"bri zero {label_short_circuit}") - - self.emit_label(label_short_circuit) - self.emit(f"spu {reg}") - - case ast.Or(): - label_short_circuit = self.get_unique_name("Or_short_circuit") - - with self.allocated_reg() as reg1, self.allocated_reg() as reg2: - for arg in node.values: - self.emit(f"; Or operand {arg}") - self.visit(arg) - - self.emit(f"spo {reg1}") - self.emit(f"subi {reg1} 1 {reg2}") - self.emit(f"bri carry {label_short_circuit}") - - self.emit_label(label_short_circuit) - self.emit(f"spu {reg1}") - - case other: - raise NotImplementedError(f"Unhandled BoolOp: {other}") - - def visit_BinOp(self, node: ast.BinOp): - self.emit(f"; {node.op}") - - self.emit(f"; BinOp lhs {node}") - self.visit(node.left) - self.emit(f"; BinOp rhs {node}") - self.visit(node.right) - - with self.allocated_reg() as reg1, self.allocated_reg() as reg2: - self.emit(f"spo {reg2}") - self.emit(f"spo {reg1}") - - match node.op: - case ast.Add(): - self.emit(f"add {reg1} {reg2} {reg1}") - case ast.Sub(): - self.emit(f"sub {reg1} {reg2} {reg1}") - case ast.BitAnd(): - self.emit(f"and {reg1} {reg2} {reg1}") - case ast.BitOr(): - self.emit(f"or {reg1} {reg2} {reg1}") - case ast.BitXor(): - self.emit(f"xor {reg1} {reg2} {reg1}") - case ast.LShift(): - self.emit(f"sll {reg1} {reg2} {reg1}") - case ast.RShift(): - self.emit(f"slr {reg1} {reg2} {reg1}") - case other: - raise NotImplementedError(f"Unhandled BinOp: {other}") - - self.emit(f"spu {reg1}") - - def visit_Constant(self, node: ast.Constant): - self.emit(f"; {node}") - match node.value: - case bool(value): - int_value = 1 if value else 0 - self.eval_int_constant_and_spu(int_value) - case int(value): - self.eval_int_constant_and_spu(value) - case str(value): - if len(value) > 1: - raise Exception("Invalid string, only single char values allowed: " + value) - - c = value[0] - int_value = ord(c) - self.eval_int_constant_and_spu(int_value) - case other: - raise NotImplementedError(f"Unhandled Constant: {other}") - - def visit_If(self, node: ast.If): - self.emit(f"; {node}") - - self.visit(node.test) - label_false = self.get_unique_name("If_false_branch") - label_end = self.get_unique_name("If_end_branch") - - with self.allocated_reg() as reg: - self.emit(f"spo {reg}") - self.emit(f"addi {reg} 0 {reg}") - self.emit(f"bri zero {label_false}") - - for true_branch_stmt in node.body: - if type(true_branch_stmt) == ast.Expr and type(true_branch_stmt.value) != ast.Call: - self.emit("; NOP top-level expression") - continue - - self.visit(true_branch_stmt) - - self.emit(f"jpi {label_end}") - self.emit_label(label_false) - - for false_branch_stmt in node.orelse: - if type(false_branch_stmt) == ast.Expr and type(false_branch_stmt.value) != ast.Call: - self.emit("; NOP top-level expression") - continue - - self.visit(false_branch_stmt) - - self.emit_label(label_end) - - def visit_Compare(self, node: ast.Compare): - self.emit(f"; {node}") - - if len(node.ops) > 1: - raise Exception("Multiple compare ops not supported") - - if len(node.comparators) > 1: - raise Exception("Multiple comparators not supported") - - op = node.ops[0] - left = node.left - right = node.comparators[0] - - label_true = self.get_unique_name("Compare_true") - label_end = self.get_unique_name("Compare_end") - - self.visit(left) - self.visit(right) - - self.emit(f"; Comparing {left} {op} {right}") - with self.allocated_reg() as reg_lhs, self.allocated_reg() as reg_rhs: - match op: - case ast.Lt(): # lhs < rhs - self.emit(f"spo {reg_rhs}") - self.emit(f"spo {reg_lhs}") - - self.emit(f"sub {reg_lhs} {reg_rhs} {reg_lhs}") - self.emit(f"bri carry {label_true}") - - # false branch - self.emit(f"ldi 0 {reg_lhs}") - self.emit(f"spu {reg_lhs}") - self.emit(f"jpi {label_end}") - - # true branch - self.emit_label(label_true) - self.emit(f"ldi 1 {reg_lhs}") - self.emit(f"spu {reg_lhs}") - - self.emit_label(label_end) - - def visit_While(self, node: ast.While): - self.emit(f"; {node}") - - label_test = self.get_unique_name("While_test") - label_else = self.get_unique_name("While_else") - label_end = self.get_unique_name("While_end") - - prev_break_target = self.latest_break_target - self.latest_break_target = label_end - - with self.allocated_reg() as reg: - self.emit_label(label_test) - self.visit(node.test) - self.emit(f"spo {reg}") - self.emit(f"addi {reg} 0 {reg}") - self.emit(f"bri zero {label_else}") - - for body_stmt in node.body: - if type(body_stmt) == ast.Expr and type(body_stmt.value) != ast.Call: - self.emit("; NOP top-level expression") - continue - - self.visit(body_stmt) - - self.emit(f"jpi {label_test}") - - self.emit_label(label_else) - - for else_stmt in node.orelse: - self.visit(else_stmt) - - self.emit_label(label_end) - - self.latest_break_target = prev_break_target - - def visit_Pass(self, node: ast.Pass): - self.emit(f"; {node}") - pass - - def visit_Break(self, node: ast.Break): - self.emit(f"; {node}") - - if self.latest_break_target is None: - raise Exception("Invalid break: no break target defined, i.e. no place to break out to") - - self.emit(f"jpi {self.latest_break_target}") - - def visit_For(self, node: ast.For): - raise Exception("For loops not supported. Consider using a while loop instead.") - - def visit_Lambda(self, node: ast.Lambda): - raise Exception("Lambda functions not supported. Consider using a named function instead.") - - def collect_local_variables(self, stmts: list[ast.stmt]): - result: list[str] = [] - symbols: list[str] = [] - for stmt in stmts: - match stmt: - case ast.Assign(targets=[ast.Name(name)]): - symbols.append(name) - case ast.Assign(other): - raise Exception(f"Unsupported assignment in function definition body: {other}") - case ast.While(body=body): - symbols += self.collect_local_variables(body) - case ast.If(body=tb, orelse=fb): - symbols += self.collect_local_variables(tb) - symbols += self.collect_local_variables(fb) - case other: pass - - for symbol in symbols: - if symbol not in result: - result.append(symbol) - - return result - - def visit_FunctionDef(self, node: ast.FunctionDef): - prev_currently_emitting_asm_list = self.currently_emitting_asm_list - self.currently_emitting_asm_list = self.function_def_asms - self.emit(f"; {node}") - - fn_name = node.name - fn_params = [str(param.arg) for param in node.args.args] - fn_stmts = node.body - - # Add a "return None" to the end to make sure the function returns - if len(fn_stmts) == 0 or type(fn_stmts[len(fn_stmts) - 1]) != ast.Return: - fn_stmts.append(ast.Return(value=None)) - - if len(node.args.kwonlyargs) > 0 or len(node.args.posonlyargs) > 0 or len(node.args.kw_defaults) > 0 or len(node.args.defaults) > 0: - raise Exception("Only simple positional args are supported for now in function definitions.") - - self.emit_label(fn_name) - local_var_names = self.collect_local_variables(fn_stmts) - frame_names = fn_params + local_var_names - - # Move stack pointer to accommodate local variables - if len(local_var_names) > 0: - self.emit_add_imm("SP", len(local_var_names), "SP") - - prev_local_bindings = self.local_bindings - self.local_bindings = {} - self.emit("; stack frame with offsets") - for offset, name in enumerate(frame_names): - self.local_bindings[name] = offset - self.emit(f"; {name} {offset}") - - for stmt in fn_stmts: - self.visit(stmt) - - self.local_bindings = prev_local_bindings - self.currently_emitting_asm_list = prev_currently_emitting_asm_list - - def visit_Return(self, node: ast.Return): - self.emit(f"; {node}") - - with self.allocated_reg() as reg1, self.allocated_reg() as reg2: - if node.value is not None: - self.visit(node.value) - else: - self.emit(f"ldi 0 {reg1}") - self.emit(f"spu {reg1}") - - self.emit(f"; return value is on top of stack") - - self.emit(f"; return from function") - self.emit(f"subi FP 1 FP") - self.emit(f"ldr FP {reg2}") - self.emit(f"jpr {reg2}") - - def visit_Call(self, node: ast.Call): - self.emit(f"; {node}") - - match node.func: - case ast.Attribute(ast.Name(id="atk16"), attr): - self.emit_builtin_call(attr, node.args) - case ast.Name(name): - self.emit(f"; Call function {name}") - - # Push the current FP - self.emit("spu FP") - #self.emit("mov SP FP") # BUG: FP needs to be moved AFTER EVALING ARGS! args depend on FP in calling frame if there are names to resolve! - - # Reserve a stack slot for the return address - # FP will point to this slot - with self.allocated_reg() as reg: - self.emit(f"ldi 0 {reg}") - self.emit(f"spu {reg}") - - # Evaluate args before call, pushing them to stack - for arg in node.args: - self.visit(arg) - - self.emit(f"subi SP {1 + len(node.args)} FP") - - with self.allocated_reg() as reg: - self.emit("; set up return address and jump to subroutine") - self.emit(f"lpc {reg}") - self.emit(f"addi {reg} 4 {reg}") # imm must equal number of primitive instrs from lpc until jpi - self.emit(f"str {reg} FP") - self.emit(f"addi FP 1 FP") - self.emit(f"jpi {name}") - # ...after return from call... - self.emit(f"spo {reg}") - - self.emit("mov FP SP") # move stack pointer to base of stack frame, i.e. top of previous frame - self.emit("spo FP") # restore FP of previous frame - self.emit(f"spu {reg}") - - case other: - raise NotImplementedError(f"Unhandled Call: {other}") - - def resolve_name(self, name: str) -> Label | StackOffset: - if name in self.local_bindings: - return self.local_bindings[name] - - if name in self.const_bindings: - return self.const_bindings[name] - - raise Exception(f"{name} is unbound") - - def visit_Name(self, node: ast.Name): - self.emit(f"; {node} ({node.id})") - - name = node.id.lower() - addr = self.resolve_name(name) - - with self.allocated_reg() as reg: - match addr: - case Label(label): - self.emit(f"ldi {label} {reg}") - case StackOffset(offset): - self.emit(f"ldi {offset} {reg}") - self.emit(f"add FP {reg} {reg}") - case other: - raise Exception(f"Unsupported addr value: {other}") - - self.emit(f"ldr {reg} {reg}") - self.emit(f"spu {reg}") - - def visit_Assign(self, node: ast.Assign): - self.emit(f"; {node}") - - targets = node.targets - value = node.value - match targets: - case [ast.Name(name)]: - offset = self.resolve_name(name) - - if type(offset) != StackOffset: - raise Exception(f"Invalid address {offset} for name {name}. Can only assign to stack offsets.") - - self.emit(f"; assigning {name} at FP + {offset}") - - with self.allocated_reg() as reg1, self.allocated_reg() as reg2: - self.emit(f"; evaluating value to be assigned") - self.visit(value) - self.emit(f"; assigning stack address (FP + {offset}) := top of stack") - self.emit(f"spo {reg1}") # value - - self.emit(f"ldi {offset} {reg2}") - self.emit(f"add {reg2} FP {reg2}") # address - self.emit(f"str {reg1} {reg2}") - - case other: - raise Exception(f"Unsupported assign targets: {other}") - - def visit_AugAssign(self, node: ast.AugAssign): - op = node.op - lhs = node.target - rhs = node.value - - if type(lhs) != ast.Name: - raise Exception("AugAssign to non-Name lhs not yet supported!") - - # construct bin op and assignment - bin_op = ast.BinOp(left=lhs, op=op, right=rhs) - assign = ast.Assign(targets=[lhs], value=bin_op) - - self.visit(assign) - - def visit_Import(self, node: ast.Import) -> Any: - match node.names: - case [ast.alias(name="atk16")]: - return - case other: - raise NotImplementedError(f"Unsupported import {other}") - - def visit_AnnAssign(self, node: ast.AnnAssign): - match node: - case ast.AnnAssign( - target=ast.Name(name), - annotation=ast.Attribute( - value=ast.Name(id="atk16"), - attr="ConstWord16"), - value=ast.Constant(value) # TODO: constant folding - ): - if type(value) == int: - self.assign_const(name.lower(), value) - return - - raise NotImplementedError("Unhandled AnnAssign:\n" + ast.dump(node, indent=4)) - - def get_module_exports(self, node: ast.Module): - result: list[str] = [] - for stmt in node.body: - match stmt: - case ast.FunctionDef(name): - result.append(name) - case _: - # only function exported since recognizing which assignments are constants is kinda hard - pass - - return result - -with open(infile_path, "r") as f: - source_py = f.read() - -with open("asm/ast_compiler_bootstrap.atk16", "r") as f: - bootstrap_asm = f.read() - -compiler = Compiler() -asm_out = compiler.compile( - bootstrap_asm, - source_py, -) - -with open(outfile_path, "w") as f: - f.write(asm_out) - diff --git a/atk16-bytecode-compiler/bytecode_compiler.py b/atk16-bytecode-compiler/bytecode_compiler.py deleted file mode 100644 index 42cf8dc..0000000 --- a/atk16-bytecode-compiler/bytecode_compiler.py +++ /dev/null @@ -1,220 +0,0 @@ -#!/usr/bin/env python3 -# Generate .atk16 assembly from Python bytecode - -import sys -import dis - -from dataclasses import dataclass -from typing import Literal, Set, cast, Any -from collections import OrderedDict - -if len(sys.argv) != 3: - print("usage: compiler.py ") - sys.exit(1) - -infile_path = sys.argv[1] -outfile_path = sys.argv[2] - -with open(infile_path, "r") as f: - source_py = f.read() - -compiled_code = compile(source_py, infile_path, 'exec') -disassembled = dis.get_instructions(compiled_code) - -co_consts = compiled_code.co_consts -co_names = compiled_code.co_names -print("### Constants") -print(co_consts) -print("\n### Names") -print(co_names) -print("\n### Instructions") -instrs: list[tuple[str, int | None]] = [] -for instr in disassembled: - print(f"{instr.opname}\t{instr.arg}") - instrs.append((instr.opname, instr.arg)) - -### compile -asm_out: list[str] = [] -def emit(stmt: str) -> int: - ret = len(asm_out) - asm_out.append(stmt) - return ret - -_counter = 0 -def get_unique_name(prefix: str): - global _counter - ret = f"{prefix}_{_counter}" - _counter += 1 - return ret - -@dataclass -class Label: - label: str - - def __str__(self): - return f"@label {self.label}" - -RegChar = Literal["A", "B", "C", "D", "E", "F", "G", "H"] -GENERIC_REGS_LST: list[RegChar] = ["A", "B", "C", "D", "E", "F"] -GENERIC_REGS: OrderedDict[RegChar, None] = OrderedDict() -for char in GENERIC_REGS_LST: - GENERIC_REGS[cast(RegChar, char)] = None - -@dataclass -class Reg: - reg: RegChar - - def __str__(self): - return f"R{self.reg}" - -Value = Label | Reg - -reserved_regs: OrderedDict[RegChar, None] = OrderedDict() -def alloc_reg() -> Reg: - for reg in GENERIC_REGS: - if not reg in reserved_regs: - reserved_regs[reg] = None - return Reg(reg) - - raise Exception("Ran out of registers, TODO use stack") - -def free_reg(reg: Reg): - reserved_regs.pop(reg.reg) - -def emit_serialize_const(const: Any): - match const: - case int(v): - emit(f" {v}") - case str(v): - if len(v) > 1: - raise Exception("Cannot serialize const string: " + v) - - emit(f" {ord(v[0])}") - case _: - print(f"warn: cannot serialize {type(const)} ({const}), emitting zero") - emit(" 0") - -STACK_POINTER_REG = Reg('H') -emit(f"@let SP {STACK_POINTER_REG}") -emit("@use ext_std:*") -emit("@include bootstrap") - -py_consts_addr = emit("@label py_consts") - -for const_i, const in enumerate(co_consts): - emit(f"; {const_i}: {const}") - emit_serialize_const(const) - -emit("@label atk_store") -_reg_value = alloc_reg() -_reg_addr = alloc_reg() -emit(f" str RB RA") -emit(f" rsr") -free_reg(_reg_value) -free_reg(_reg_addr) - -emit("@label atk_enable_text_mode") -emit(" set_graphics_mode gr_text_mode") -emit(" rsr") - -emit("@label main") - -instr_i = 0 - -def instr_pop(): - global instr_i - ret = instrs[instr_i] - instr_i += 1 - return ret - -def instr_pop_expect(opcode: str, arg: int | None = -1): - ret_op, ret_arg = instr_pop() - if ret_op != opcode: - raise Exception(f"Expected opcode {opcode}, got {ret_op}") - if arg != -1 and arg != ret_arg: - raise Exception(f"Expected instruction arg {arg}, got {ret_arg}") - return ret_op, ret_arg - -def instr_peek(): - return instrs[instr_i] - -def instr_peek_expect(opcode: str, arg: int | None = -1): - ret_op, ret_arg = instr_peek() - if ret_op != opcode: - raise Exception(f"Expected {opcode}, got {ret_op}") - if arg != -1 and arg != ret_arg: - raise Exception(f"Expected instruction arg {arg}, got {ret_arg}") - return ret_op, ret_arg - -instr_pop_expect("RESUME") -instr_pop_expect("LOAD_CONST", 0) -instr_pop_expect("LOAD_CONST", 1) -instr_pop_expect("IMPORT_NAME", 0) -instr_pop_expect("IMPORT_STAR", None) - -while instr_i < len(instrs): - opcode, arg = instr_pop() - emit(f"; {opcode} {arg}") - match opcode: - case "LOAD_CONST": - reg = alloc_reg() - emit(f" ldi ${{py_consts + {cast(int, arg)}}} {reg}") - emit(f" ldr {reg} {reg}") - emit(f" spu {reg}") - free_reg(reg) - case "PUSH_NULL": - reg = alloc_reg() - emit(f" ldi 0 {reg}") - emit(f" spu {reg}") - free_reg(reg) - case "LOAD_NAME": - name = co_names[cast(int, arg)] - reg = alloc_reg() - emit(f" ldi {name} {reg}") - emit(f" spu {reg}") - free_reg(reg) - case "CALL": - arg_count = cast(int, arg) - # if arg_count > len(GENERIC_REGS_LST): - # raise Exception(f"Function calls with > {len(GENERIC_REGS_LST)} arguments not supported") - - regs_to_restore: list[tuple[Reg, Reg]] = [] - for j in range(arg_count): - i = arg_count - j - 1 - ith_reg_char = GENERIC_REGS_LST[i] - ith_reg = Reg(ith_reg_char) - if ith_reg_char in reserved_regs: - reg = alloc_reg() - emit(f" mov {ith_reg} {reg}") - regs_to_restore.append((reg, ith_reg)) - - emit(f" spo {ith_reg}") - reserved_regs[ith_reg_char] = None # manually reserve ith_reg - - fn_reg = alloc_reg() - emit(f" spo {fn_reg}") - # emit(f" ldr {fn_reg} {fn_reg}") - emit(f" csr {fn_reg}") - free_reg(fn_reg) - - for from_reg, ith_reg in regs_to_restore: - emit(f" mov {from_reg} {ith_reg}") - - for j in range(arg_count): - i = arg_count - j - 1 - ith_reg_char = GENERIC_REGS_LST[i] - ith_reg = Reg(ith_reg_char) - free_reg(ith_reg) - - case "POP_TOP": - reg = alloc_reg() - emit(f" spo {reg}") - free_reg(reg) - case _: - print(f"Skipping not implemented opcode: {opcode}") - -emit("@label keep_alive") -emit(" jpi keep_alive") - -with open(outfile_path, "w") as f: - f.write("\n".join(asm_out)) diff --git a/atk16-syntax/README.md b/atk16-syntax/README.md deleted file mode 100644 index da81144..0000000 --- a/atk16-syntax/README.md +++ /dev/null @@ -1,9 +0,0 @@ -# VSCode syntax highlighting extension for ATK16 assembly - -## Installation - -In `atk16-syntax-highlighting` directory, run: - - npx @vscode/vsce package - -Then go to VSCode > Command Palette > Extensions: Install from VSIX and select the generated `.vsix` file. diff --git a/atk16-syntax/atk16-syntax-0.0.1.vsix b/atk16-syntax/atk16-syntax-0.0.1.vsix deleted file mode 100644 index 253d326..0000000 Binary files a/atk16-syntax/atk16-syntax-0.0.1.vsix and /dev/null differ diff --git a/atk16-syntax/extension.js b/atk16-syntax/extension.js deleted file mode 100644 index 26b4d9d..0000000 --- a/atk16-syntax/extension.js +++ /dev/null @@ -1,196 +0,0 @@ -const vscode = require('vscode'); -const path = require('path'); - -class ATK16HoverProvider { - async provideHover(document, position, token) { - const range = document.getWordRangeAtPosition(position, /[\w-/.]+/); - const labelText = document.getText(range); - const subroutineDefinition = await findSubroutineInDocument(document, labelText); - if (subroutineDefinition) { - const hoverText = new vscode.MarkdownString(subroutineDefinition); - hoverText.isTrusted = true; - return new vscode.Hover(hoverText); - } - - // Search for labels in included files - for (let i = 0; i < document.lineCount; i++) { - const line = document.lineAt(i); - const includeMatch = line.text.match(/@include\s+(\S+)/); - if (includeMatch) { - const includedFilePath = path.join( - path.dirname(document.fileName), - `${includeMatch[1]}.atk16` - ); - - if (await vscode.workspace.fs.stat(vscode.Uri.file(includedFilePath))) { - const includedDocument = await vscode.workspace.openTextDocument( - includedFilePath - ); - const subroutineDefinition = await findSubroutineInDocument(includedDocument, labelText); - if (subroutineDefinition) { - const hoverText = new vscode.MarkdownString(subroutineDefinition); - hoverText.isTrusted = true; - return new vscode.Hover(hoverText); - } - } - } - } - - return null; - } -} - -class ATK16DefinitionProvider { - async provideDefinition(document, position, token) { - const range = document.getWordRangeAtPosition(position, /[\w-/.]+/); - const text = document.getText(range); - - const line = document.lineAt(position); - const includeMatch = line.text.match(/@include\s+(\S+)/); - const useMatch = line.text.match(/@use\s+(\S+):/); - - if (includeMatch && includeMatch[1] === text) { - const includedFilePath = path.join( - path.dirname(document.fileName), - `${includeMatch[1]}.atk16` - ); - - try { - await vscode.workspace.fs.stat(vscode.Uri.file(includedFilePath)); - return new vscode.Location( - vscode.Uri.file(includedFilePath), - new vscode.Position(0, 0) - ); - } catch (err) { - vscode.window.showErrorMessage( - `ATK16: File not found: ${includedFilePath}` - ); - } - } else if (useMatch && useMatch[1] === text) { - const includedFilePath = path.join( - path.dirname(document.fileName), - `${useMatch[1]}.py` - ); - - try { - await vscode.workspace.fs.stat(vscode.Uri.file(includedFilePath)); - return new vscode.Location( - vscode.Uri.file(includedFilePath), - new vscode.Position(0, 0) - ); - } catch (err) { - vscode.window.showErrorMessage( - `ATK16: File not found: ${includedFilePath}` - ); - } - } else { - const labelText = document.getText(range); - let definitionLocation = await findDefinitionInDocument(document, labelText); - if (definitionLocation) { - return definitionLocation; - } - - // Search for labels in included files - for (let i = 0; i < document.lineCount; i++) { - const line = document.lineAt(i); - const includeMatch = line.text.match(/@include\s+(\S+)/); - if (includeMatch) { - const includedFilePath = path.join( - path.dirname(document.fileName), - `${includeMatch[1]}.atk16` - ); - - if (await vscode.workspace.fs.stat(vscode.Uri.file(includedFilePath))) { - const includedDocument = await vscode.workspace.openTextDocument( - includedFilePath - ); - definitionLocation = await findDefinitionInDocument(includedDocument, labelText); - if (definitionLocation) { - return definitionLocation; - } - } - } - } - } - - return null; - } -} - -async function findDefinitionInDocument(document, labelText) { - for (let i = 0; i < document.lineCount; i++) { - const line = document.lineAt(i); - if (line.text.includes(`@label ${labelText}`) || line.text.includes(`@let ${labelText}`)) { - return new vscode.Location(document.uri, line.range.start); - } - } - return null; -} - -async function findSubroutineInDocument(document, labelText) { - let name = null; - const params = []; - const returns = []; - let extra = ""; - for (let i = 0; i < document.lineCount; i++) { - const line = document.lineAt(i); - if (line.text.includes(`@label ${labelText}`)) { - for (let j = i + 1; j < document.lineCount; j++) { - const docLine = document.lineAt(j); - const docCommentMatch = docLine.text.match(/;;;\s+(.*)/); - if (docCommentMatch) { - const lineText = docCommentMatch[1]; - const parts = lineText.trim().split(/\s+/g); - if (lineText.startsWith('subroutine')) { - name = parts[parts.length - 1].trim(); - } else if (lineText.startsWith('param')) { - const [_kw, reg, ...desc] = parts; - params.push([reg.trim(), desc.filter(a => a).join(" ")]) - } else if (lineText.startsWith('return')) { - const [_kw, reg, ...desc] = parts; - returns.push([reg.trim(), desc.filter(a => a).join(" ")]) - } else { - extra += `${lineText}\n`; - } - } else { - break; - } - } - } - } - - if (name === null) return null; - - let definition = `### ${name}\n_Subroutine_\n\n`; - definition += extra; - if (params.length > 0) { - definition += "\n\n|Reg|Parameter|\n"; - definition += "|:---|:---|\n"; - } - for (const [reg, desc] of params) { - definition += `|${reg}|${desc}|\n`; - } - - if (returns.length > 0) { - definition += "\n|Reg|Return|\n"; - definition += "|:---|:---|\n"; - } - for (const [reg, desc] of returns) { - definition += `|${reg}|${desc}|\n`; - } - return definition; -} - -function activate(context) { - context.subscriptions.push( - vscode.languages.registerDefinitionProvider('atk16', new ATK16DefinitionProvider()), - vscode.languages.registerHoverProvider('atk16', new ATK16HoverProvider()) - ); -} - -function deactivate() {} - -module.exports = { - activate, - deactivate, -}; \ No newline at end of file diff --git a/atk16-syntax/language-configuration.json b/atk16-syntax/language-configuration.json deleted file mode 100644 index c186b1b..0000000 --- a/atk16-syntax/language-configuration.json +++ /dev/null @@ -1,41 +0,0 @@ -{ - "comments": { - "lineComment": ";" - }, - "brackets": [ - [ - "{", - "}" - ], - [ - "[", - "]" - ], - [ - "(", - ")" - ] - ], - "autoClosingPairs": [ - [ - "{", - "}" - ], - [ - "[", - "]" - ], - [ - "(", - ")" - ], - [ - "\"", - "\"" - ], - [ - "'", - "'" - ] - ] -} \ No newline at end of file diff --git a/atk16-syntax/package.json b/atk16-syntax/package.json deleted file mode 100644 index 6a64b6c..0000000 --- a/atk16-syntax/package.json +++ /dev/null @@ -1,48 +0,0 @@ -{ - "name": "atk16-syntax", - "displayName": "ATK16 Syntax", - "description": "Syntax highlighting and support for ATK16 assembly language", - "version": "0.0.1", - "publisher": "JanTuomi", - "license": "MIT", - "repository": "", - "engines": { - "vscode": "^1.60.0" - }, - "categories": ["Programming Languages"], - "activationEvents": [ - "onLanguage:atk16" - ], - "main": "./extension.js", - "contributes": { - "languages": [ - { - "id": "atk16", - "aliases": ["ATK16 Assembly", "atk16"], - "extensions": [".atk16"], - "configuration": "./language-configuration.json" - } - ], - "grammars": [ - { - "language": "atk16", - "scopeName": "source.atk16", - "path": "./syntaxes/atk16.tmLanguage.json" - } - ], - "configurationDefaults": { - "editor.tokenColorCustomizations": { - "[Default Dark+]": { - "textMateRules": [ - { - "scope": "comment.documentation.atk16", - "settings": { - "fontStyle": "italic" - } - } - ] - } - } - } - } -} diff --git a/atk16-syntax/syntaxes/atk16.tmLanguage.json b/atk16-syntax/syntaxes/atk16.tmLanguage.json deleted file mode 100644 index 6dcf0ea..0000000 --- a/atk16-syntax/syntaxes/atk16.tmLanguage.json +++ /dev/null @@ -1,44 +0,0 @@ -{ - "$schema": "https://raw.githubusercontent.com/martinring/tmlanguage/master/tmlanguage.json", - "name": "ATK16", - "patterns": [ - { - "name": "comment.documentation.atk16", - "match": ";;;.*" - }, - { - "name": "comment.line.semicolon.atk16", - "match": ";.*" - }, - { - "name": "keyword.control.directive.atk16", - "match": "^@\\w+" - }, - { - "name": "variable.other.register.atk16", - "match": "\\bR[A-H]\\b" - }, - { - "name": "constant.numeric.hex.atk16", - "match": "\\b0x[0-9a-fA-F]+\\b" - }, - { - "name": "constant.numeric.binary.atk16", - "match": "\\b0b[01]+\\b" - }, - { - "name": "constant.numeric.decimal.atk16", - "match": "\\b[0-9]+\\b" - }, - { - "name": "keyword.control.symbol.atk16", - "match": "^\\s+[a-zA-Z_-]+" - }, - { - "name": "constant.language.flag.atk16", - "match": "\\b(carry|overflow|zero|sign)\\b" - } - ], - "repository": {}, - "scopeName": "source.atk16" -} diff --git a/atk16-utils/charmem.py b/atk16-utils/charmem.py deleted file mode 100644 index aaac122..0000000 --- a/atk16-utils/charmem.py +++ /dev/null @@ -1,63 +0,0 @@ -#!/usr/bin/env python3 -# Generate .bin file with ATK16 CPU TPU charmem data - -# Addressed by _CCC CCCC CYYY -# Data width 8bit: ___X XXXX -# where _ = unused, C = 8bit character code, Y = character y coordinate, X = pixel value - -import sys - -if len(sys.argv) != 2: - print("usage: charmem.py ") - sys.exit(1) - -outfile_path = sys.argv[1] - -with open("charset.txt", "r") as f: - lines = [s.strip("\n") for s in f.readlines()] - -header_chars = lines[0] - -charset: list[list[str]] = [] - -CHAR_HEIGHT = 8 -CHAR_WIDTH = 8 - -i = 0 -while i < len(lines): - i += 1 # skip comment line - char = lines[i:i+CHAR_HEIGHT] - for row in char: - if len(row) != CHAR_WIDTH: - raise Exception(f"char row number {i} has width != {CHAR_WIDTH}: {len(row)}\n" + row + "\n" + "\n".join(char)) - charset.append(char) - i += CHAR_HEIGHT + 1 - -CHAR_N = len(charset) - -TOTAL_BYTEARRAY_SIZE = CHAR_N * CHAR_HEIGHT - -def string_to_byte(input_string: str): - # Replace spaces with '0' and '#' with '1' - binary_string = input_string.replace(' ', '0').replace('█', '1') - - assert(len(input_string) == CHAR_WIDTH) - - # Check if the string contains only '0' or '1' - if not all(c in '01' for c in binary_string): - raise ValueError("Input string must contain only spaces and '█' characters.") - - # Convert the binary string to an unsigned integer byte - return int(binary_string[::-1], 2) - - -res_b = bytearray(TOTAL_BYTEARRAY_SIZE) -for cn, char in enumerate(charset): - for cy in range(0, CHAR_HEIGHT): - addr = (cn << 3) + cy - byte = string_to_byte(char[cy]) - print(f"{byte:>08b}") - res_b[addr] = byte - -with open(outfile_path, "wb") as f: - f.write(res_b) diff --git a/atk16-utils/convert_ttf.py b/atk16-utils/convert_ttf.py deleted file mode 100644 index c1135cb..0000000 --- a/atk16-utils/convert_ttf.py +++ /dev/null @@ -1,52 +0,0 @@ -from PIL import Image, ImageFont, ImageDraw - -import sys - -if len(sys.argv) != 3: - print("usage: convert_ttf.py ") - sys.exit(1) - -# Define the font file and size -font_file = sys.argv[1] -out_file = sys.argv[2] -font_size = 8 # 8x8 pixels - -# Create a font object -font = ImageFont.truetype(font_file, font_size) - - -# backspace 0x8, tab 0x9, newline 0xA, space 0x20 - -# Define the characters to render -#characters = ' !"#$%&\'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_`abcdefghijklmnopqrstuvwxyz{|}~ ¡¢£¤¥¦§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖ×ØÙÚÛÜÝÞßàáâãäåæçèéêëìíîïðñòóôõö÷øùúûüýþÿ' - -def to_char_code(i: int) -> str: - if i == 10: - return " " - return chr(i) - -characters = [to_char_code(i) for i in range(0, 256)] - - -# Open a file to write the bitmaps to -with open(out_file, 'w') as bitmap_file: - for char_idx, char in enumerate(characters): - # Create a new image with a white background - image = Image.new('1', (8, 8), 1) - - # Create a drawing context - draw = ImageDraw.Draw(image) - - # Draw the character - draw.text((0, 0), char, font=font, fill=0) - - # Convert the image to a list of 0's and 1's - pixels = image.getdata() - bitmap = [1 if pixel == 0 else 0 for pixel in pixels] - - # Write the bitmap to the file - bitmap_file.write(f'Character {char_idx}: {char}\n') - for i in range(0, 64, 8): - row = bitmap[i:i+8] - bitmap_file.write(''.join(str(bit) for bit in row) + '\n') - bitmap_file.write('\n') diff --git a/atk16-utils/dig_install.py b/atk16-utils/dig_install.py deleted file mode 100644 index c32229b..0000000 --- a/atk16-utils/dig_install.py +++ /dev/null @@ -1,60 +0,0 @@ -#!/usr/bin/env python3 -# Install a generated .bin file into a memory chip in a .dig circuit file - -import sys -from typing import cast -import xml.etree.ElementTree as ET - -if len(sys.argv) != 4: - print("usage: dig_install.py ") - sys.exit(1) - -infile = sys.argv[1] -circuitfile = sys.argv[2] -chip_label = sys.argv[3] - -with open(infile, "rb") as f: - program_bytes = f.read() - -i = 0 -program_words: list[str] = [] -while i < len(program_bytes): - hi_byte = program_bytes[i] - lo_byte = program_bytes[i + 1] - word = f"{hi_byte:>02x}{lo_byte:>02x}" - #print(word) - program_words.append(word) - i += 2 - -program_data = ",".join(program_words) -print("program_data:", program_data) - -tree = ET.parse(circuitfile) -root = tree.getroot() - -# Iterate through each 'visualElement' element -def find_data_element(root: ET.Element) -> ET.Element: - is_correct_visual_element = False - for visual_element in root.findall('.//visualElement'): - element_attributes = visual_element.find('elementAttributes') - if element_attributes is None: continue - - entries = list(element_attributes) - for entry in entries: - strings = entry.findall("string") - is_label_entry = len(strings) == 2 and strings[0].text == "Label" and strings[1].text == chip_label - if is_label_entry and not is_correct_visual_element: - is_correct_visual_element = True - continue - - is_data_entry = len(strings) == 1 and strings[0].text == "Data" - if is_data_entry and is_correct_visual_element: - data_element = entry.findall("data")[0] - return data_element - - raise Exception(f"No data entry matching label {chip_label} found in tree") - -data_element = find_data_element(root) -data_element.text = program_data - -tree.write(circuitfile) \ No newline at end of file diff --git a/atk16-utils/pad_bin.py b/atk16-utils/pad_bin.py deleted file mode 100644 index 9f014d1..0000000 --- a/atk16-utils/pad_bin.py +++ /dev/null @@ -1,59 +0,0 @@ -import os - -def pad_binary(file_path, target_size) -> int: - """ - Pads a binary file with zeros until it reaches a specified size in KiB. - - :param file_path: Path to the binary file to be padded. - :param target_size: Target size in bytes. - """ - - # Check current file size - current_size = os.path.getsize(file_path) - - # Calculate needed padding - padding_size = target_size - current_size - - # Append zeros if needed - if padding_size > 0: - with open(file_path, 'ab') as file: - file.write(b'\x00' * padding_size) - - return padding_size - -def convert_size_to_bytes(size_str: str) -> int: - """ - Converts a size string with K, M, or G suffix to bytes. - - :param size_str: Size string (e.g., "64K", "1M", "2G"). - :return: Size in bytes. - """ - size_str = size_str.upper() - if size_str.endswith('K'): - return int(size_str[:-1]) * 1024 - elif size_str.endswith('M'): - return int(size_str[:-1]) * 1024 ** 2 - elif size_str.endswith('G'): - return int(size_str[:-1]) * 1024 ** 3 - else: - return int(size_str) - -if __name__ == "__main__": - import argparse - - # Setup argument parser - parser = argparse.ArgumentParser(description='Pad a binary file with zeros until it reaches a specified size.') - parser.add_argument('file', type=str, help='Path to the binary file to be padded.') - parser.add_argument('--to', dest='size', type=str, help='Target size (e.g., 64K, 1M, 2G).', required=True) - - args = parser.parse_args() - - # Convert size argument to bytes - target_size_bytes = convert_size_to_bytes(args.size) - - padded_bytes_n = pad_binary(args.file, target_size_bytes) - - if padded_bytes_n > 0: - print(f"File has been padded with {padded_bytes_n} zeros.") - else: - print("File is already equal to or larger than the target size. No padding added.") diff --git a/atk16-utils/ucode.py b/atk16-utils/ucode.py deleted file mode 100755 index 22a2ce2..0000000 --- a/atk16-utils/ucode.py +++ /dev/null @@ -1,112 +0,0 @@ -#!/usr/bin/env python3 -# Generate .bin file with ATK16 CPU microcode - -# Addressed by OOOO BUUU -# where O = opcode, B = branch flag, U = microsequencer value - -import sys - -if len(sys.argv) != 2: - print("usage: ucode.py ") - sys.exit(1) - -outfile_path = sys.argv[1] - -PC_CO = 1 << 0 -PC_IE = 1 << 1 -PC_OE = 1 << 2 -MAR_IE = 1 << 3 -MEM_IE = 1 << 4 -MEM_OE = 1 << 5 -RW_IE = 1 << 6 -R1_OE = 1 << 7 -R2_OE = 1 << 8 -IR_IE = 1 << 9 -IM_M = 1 << 10 -LI_OE = 1 << 11 -ALU_OE = 1 << 12 -FR_IE = 1 << 13 -HALT = 1 << 14 -US_RS = 1 << 15 -ISRA_OE = 1 << 16 -IM_DS = 1 << 17 -IM_EN = 1 << 18 -IPC_IE = 1 << 19 -IPC_OE = 1 << 20 -NOP5 = 1 << 21 -NOP6 = 1 << 22 -NOP7 = 1 << 23 - -BRANCH_FLAG_STATES_N = 2 -UCODE_N: int = 2**3 -CONTROL_WORD_SIZE = 3 - -def not_branch(bs: list[int]) -> list[list[int]]: - return BRANCH_FLAG_STATES_N * [bs] - -def branch(false_branch: list[int], true_branch: list[int]) -> list[list[int]]: - return [false_branch, true_branch] - -fetch = [PC_OE|MAR_IE, MEM_OE|IR_IE|PC_CO] - -def nop(): - return not_branch([*fetch, US_RS, 0, 0, 0, 0, 0]) - -ucode = [ - # ALR 0000 TTTL LLRR RSSS - not_branch([*fetch, ALU_OE|FR_IE|RW_IE, US_RS, 0, 0, 0, 0]), - # ALI 0001 TTTL LLII ISSS - not_branch([*fetch, IM_M|ALU_OE|FR_IE|RW_IE, US_RS, 0, 0, 0, 0]), - # LDR 0010 TTTR RRXX XXXX - not_branch([*fetch, R1_OE|MAR_IE, MEM_OE|RW_IE, US_RS, 0, 0, 0]), - # STR 0011 XXXL LLRR RXXX - not_branch([*fetch, R1_OE|MAR_IE, R2_OE|MEM_IE, US_RS, 0, 0, 0]), - # LDI 0100 TTTI IIII IIII - not_branch([*fetch, LI_OE|RW_IE, US_RS, 0, 0, 0, 0]), - # JPR 0101 XXXR RRXX XXXX - not_branch([*fetch, R1_OE|PC_IE, US_RS, 0, 0, 0, 0]), - # JPI 0110 XXXI IIII IIII - not_branch([*fetch, IM_M|LI_OE|PC_IE, US_RS, 0, 0, 0, 0]), - # BRR 0111 XFFR RRXX XXXX - branch([*fetch, US_RS, 0, 0, 0, 0, 0], - [*fetch, R1_OE|PC_IE, US_RS, 0, 0, 0, 0]), - # BRI 1000 XFFI IIII IIII - branch([*fetch, US_RS, 0, 0, 0, 0, 0], - [*fetch, IM_M|LI_OE|PC_IE, US_RS, 0, 0, 0, 0]), - # LPC 1001 TTTX XXXX XXXX - not_branch([*fetch, PC_OE|RW_IE, US_RS, 0, 0, 0, 0]), - # NOP 1010 XXXX XXXX XXXX - nop(), - # NOP 1011 XXXX XXXX XXXX - nop(), - # ISRP0 1100 XXXX XXXX XXXX - not_branch([IM_EN|PC_OE|IPC_IE, ISRA_OE|MAR_IE, MEM_OE|PC_IE, US_RS, 0, 0, 0, 0]), - # ISRP1 1101 XXXX XXXX XXXX - not_branch([IM_EN|PC_OE|IPC_IE, ISRA_OE|MAR_IE, MEM_OE|PC_IE, US_RS, 0, 0, 0, 0]), - # RTI 1110 XXXX XXXX XXXX - not_branch([*fetch, IM_DS|IPC_OE|PC_IE, US_RS, 0, 0, 0, 0]), - # HLT 1111 XXXX XXXX XXXX - not_branch([*fetch, HALT, 0, 0, 0, 0, 0]), -] - -INST_N = len(ucode) -TOTAL_BYTEARRAY_SIZE = INST_N * BRANCH_FLAG_STATES_N * UCODE_N * CONTROL_WORD_SIZE - -res_b = bytearray(TOTAL_BYTEARRAY_SIZE) - -for i in range(INST_N): - for j in range(BRANCH_FLAG_STATES_N): - for k in range(UCODE_N): - for l in range(CONTROL_WORD_SIZE): - idx = l + \ - k * CONTROL_WORD_SIZE + \ - j * CONTROL_WORD_SIZE * UCODE_N + \ - i * CONTROL_WORD_SIZE * UCODE_N * BRANCH_FLAG_STATES_N - cword = ucode[i][j][k] - assert len(ucode[i][j]) == 8 - cbyte = (cword >> (8 * (CONTROL_WORD_SIZE - l - 1))) & 0xff - print(f"inst: {i:>04b}, idx: {idx:>04x}, cbyte: {cbyte:>08b}") - res_b[idx] = cbyte - -with open(outfile_path, "wb") as f: - f.write(res_b) diff --git a/atk16_asm/asm_eval.py b/atk16_asm/asm_eval.py new file mode 100644 index 0000000..c05fc03 --- /dev/null +++ b/atk16_asm/asm_eval.py @@ -0,0 +1,47 @@ +constants: dict[str, str] = { + # Registers + "ra": "0", + "rb": "1", + "rc": "2", + "rd": "3", + "re": "4", + "rf": "5", + "rg": "6", + "rh": "7", + # ALU instructions + "al_plus": "0", + "al_minus": "1", + "al_and": "2", + "al_or": "3", + "al_xor": "4", + "al_slr": "5", + "al_sar": "6", + "al_sll": "7", + # ALU flags + "carry": "0", + "overflow": "1", + "zero": "2", + "sign": "3", +} + +Symbols = dict[str, int] + +def check_size(bits: int, val: int) -> None: + if val >= 2 ** bits: + raise Exception(f"Value does not fit in {bits} bits: 0x{val:>04x}") + +def eval_symbol(symbols: Symbols, c: str) -> str: + if c in symbols: + return str(symbols[c]) + + if c in constants: + return constants[c] + + return c + +def eval_expr(symbols: Symbols, expr: str, bits: int = 16) -> int: + expr = expr.lower() + expr = eval_symbol(symbols, expr) + ret = eval(expr, symbols.copy()) # eval as Python expr + check_size(bits, ret) + return ret diff --git a/atk16_asm/asm_ops.py b/atk16_asm/asm_ops.py new file mode 100644 index 0000000..885c275 --- /dev/null +++ b/atk16_asm/asm_ops.py @@ -0,0 +1,154 @@ +from typing import Callable +from asm_eval import * +from dataclasses import dataclass + +@dataclass +class Meta: + address: int + +def make_alr(meta: Meta, symbols: Symbols, alu_op: str, left: str, right: str, target: str) -> int: + """ALR 0000 TTTL LLRR RSSS""" + target_e = eval_expr(symbols, target, bits=3) + left_e = eval_expr(symbols, left, bits=3) + right_e = eval_expr(symbols, right, bits=3) + alu_op_e = eval_expr(symbols, alu_op, bits=3) + word = (0b0000 << 12) + \ + (target_e << 9) + \ + (left_e << 6) + \ + (right_e << 3) + \ + alu_op_e + return word + +def make_ali(meta: Meta, symbols: Symbols, alu_op: str, left: str, imm: str, target: str) -> int: + """ALI 0001 TTTL LLII ISSS""" + target_e = eval_expr(symbols, target, bits=3) + left_e = eval_expr(symbols, left, bits=3) + imm_e = eval_expr(symbols, imm, bits=3) + alu_op_e = eval_expr(symbols, alu_op, bits=3) + word = (0b0001 << 12) + \ + (target_e << 9) + \ + (left_e << 6) + \ + (imm_e << 3) + \ + alu_op_e + return word + +def make_ldr(meta: Meta, symbols: Symbols, addr_reg: str, to_reg: str) -> int: + """LDR 0010 TTTR RRXX XXXX""" + to_reg_e = eval_expr(symbols, to_reg, bits=3) + addr_reg_e = eval_expr(symbols, addr_reg, bits=3) + word = (0b0010 << 12) + \ + (to_reg_e << 9) + \ + (addr_reg_e << 6) + return word + +def make_str(meta: Meta, symbols: Symbols, from_reg: str, addr_reg: str) -> int: + """STR 0011 XXXL LLRR RXXX""" + from_reg_e = eval_expr(symbols, from_reg, bits=3) + addr_reg_e = eval_expr(symbols, addr_reg, bits=3) + word = (0b0011 << 12) + \ + (addr_reg_e << 6) + \ + (from_reg_e << 3) + return word + +def make_ldi(meta: Meta, symbols: Symbols, imm: str, to_reg: str) -> int: + """LDI 0100 TTTI IIII IIII""" + to_reg_e = eval_expr(symbols, to_reg, bits=3) + imm_e = eval_expr(symbols, imm, bits=9) + word = (0b0100 << 12) + \ + (to_reg_e << 9) + \ + imm_e + return word + +def make_jpr(meta: Meta, symbols: Symbols, addr_reg: str) -> int: + """JPR 0101 XXXR RRXX XXXX""" + addr_reg_e = eval_expr(symbols, addr_reg, bits=3) + word = (0b0101 << 12) + \ + (addr_reg_e << 6) + return word + +def make_jpi(meta: Meta, symbols: Symbols, imm: str) -> int: + """JPI 0110 XXXI IIII IIII""" + imm_e = eval_expr(symbols, imm, bits=9) + imm_e = imm_e - meta.address - 1 + imm_e = imm_e & (0b111111111) + #print("symbols:", symbols) + #print(meta, imm, f"0x{imm_e:>0x}") + word = (0b0110 << 12) + \ + imm_e + return word + +def make_brr(meta: Meta, symbols: Symbols, flag_s: str, addr_reg: str) -> int: + """brr 0111 XFFR RRXX XXXX""" + flag_s_e = eval_expr(symbols, flag_s, bits=2) + addr_reg_e = eval_expr(symbols, addr_reg, bits=3) + word = (0b0111 << 12) + \ + (flag_s_e << 9) + \ + (addr_reg_e << 6) + return word + +def make_bri(meta: Meta, symbols: Symbols, flag_s: str, imm: str) -> int: + """BRI 1000 XFFI IIII IIII""" + flag_s_e = eval_expr(symbols, flag_s, bits=2) + imm_e = eval_expr(symbols, imm, bits=9) + imm_e = imm_e - meta.address - 1 + imm_e = imm_e & (0b111111111) + word = (0b1000 << 12) + \ + (flag_s_e << 9) + \ + imm_e + return word + +def make_lpc(meta: Meta, symbols: Symbols, target: str) -> int: + """LPC 1001 TTTX XXXX XXXX""" + target_e = eval_expr(symbols, target, bits=3) + word = (0b1001 << 12) + \ + (target_e << 9) + return word + +def make_rti(meta: Meta, symbols: Symbols) -> int: + """RTI 1110 XXXX XXXX XXXX""" + word = (0b1110 << 12) + return word + +def make_hlt(meta: Meta, symbols: Symbols) -> int: + """HLT 1111 XXXX XXXX XXXX""" + word = (0b1111 << 12) + return word + +OpWordDict = dict[str, Callable[..., int]] +operations: OpWordDict = { + "alr": make_alr, + "ali": make_ali, + "ldr": make_ldr, + "str": make_str, + "ldi": make_ldi, + "jpr": make_jpr, + "jpi": make_jpi, + "brr": make_brr, + "bri": make_bri, + "lpc": make_lpc, + "rti": make_rti, + "hlt": make_hlt, +} + +ExpandResult = list[list[str]] +ExpandFn = Callable[..., ExpandResult] +OpExpansionDict = dict[str, ExpandFn] + +def expand_id(*parts: str) -> ExpandResult: + return [list(parts)] + +default_expansions: OpExpansionDict = { + "alr": lambda *args: expand_id("alr", *args), + "ali": lambda *args: expand_id("ali", *args), + "ldr": lambda *args: expand_id("ldr", *args), + "str": lambda *args: expand_id("str", *args), + "ldi": lambda *args: expand_id("ldi", *args), + "jpr": lambda *args: expand_id("jpr", *args), + "jpi": lambda *args: expand_id("jpi", *args), + "brr": lambda *args: expand_id("brr", *args), + "bri": lambda *args: expand_id("bri", *args), + "lpc": lambda *args: expand_id("lpc", *args), + "rti": lambda *args: expand_id("rti", *args), + "hlt": lambda *args: expand_id("hlt", *args), +} + diff --git a/atk16_asm/asm_pass0.py b/atk16_asm/asm_pass0.py new file mode 100644 index 0000000..f5b6b0b --- /dev/null +++ b/atk16_asm/asm_pass0.py @@ -0,0 +1,50 @@ +from dataclasses import dataclass +import os.path +from asm_ops import * +from asm_eval import * +from tokenizer import * + +@dataclass +class Result0Line: + line_num: int + src_file: str + line: str + +@dataclass +class Result0: + lines: list[Result0Line] + +def pass_0(lines: list[str], file_name: str) -> Result0: + result_lines: list[Result0Line] = [] + + for (line_num, line) in enumerate(lines): + line = line.split(";")[0].strip() + if line == "": continue + + keyword, *args = tokenize(line) + + match keyword: + case "@include": + asm_file_name = args[0] + path = os.path.join(os.path.dirname(file_name), asm_file_name + ".atk16") + with open(path, "r") as f: + incl_lines = f.readlines() + + incl_result0 = pass_0(incl_lines, asm_file_name) + for incl_line in incl_result0.lines: + result_lines.append(Result0Line( + src_file=incl_line.src_file, + line_num=incl_line.line_num, + line=incl_line.line + )) + + case _: + result_lines.append(Result0Line( + src_file=file_name, + line_num=line_num, + line=line + )) + + return Result0( + lines=result_lines + ) diff --git a/atk16_asm/asm_pass1.py b/atk16_asm/asm_pass1.py new file mode 100644 index 0000000..0b06738 --- /dev/null +++ b/atk16_asm/asm_pass1.py @@ -0,0 +1,48 @@ +import importlib +import sys +import os.path +from dataclasses import dataclass +from asm_ops import * +from asm_eval import * +from asm_pass0 import * +from tokenizer import tokenize + +@dataclass +class Result1Line: + line_num: int + src_file: str + parts: list[str] + +@dataclass +class Result1: + lines: list[Result1Line] + operations: OpExpansionDict + +def pass_1(result0: Result0) -> Result1: + result_lines: list[Result1Line] = [] + operations: OpExpansionDict = default_expansions.copy() + + for line in result0.lines: + keyword, *args = tokenize(line.line) + match keyword: + case "@use": + module_name, ops = args[0].split(":") + ops_split = ops.split(",") + sys.path.append(os.path.dirname(line.src_file)) + module = importlib.import_module(module_name) + mod_expansions: OpExpansionDict = module.expansions + for op in mod_expansions: + expansion = mod_expansions[op] + if ops == "*" or op in ops_split: + operations[op] = expansion + case _: + result_lines.append(Result1Line( + src_file=line.src_file, + line_num=line.line_num, + parts=[keyword, *args] + )) + + return Result1( + operations=operations, + lines=result_lines + ) diff --git a/atk16_asm/asm_pass2.py b/atk16_asm/asm_pass2.py new file mode 100644 index 0000000..e2ad4ec --- /dev/null +++ b/atk16_asm/asm_pass2.py @@ -0,0 +1,40 @@ +from dataclasses import dataclass +from asm_ops import * +from asm_eval import * +from asm_pass1 import * + +@dataclass +class Result2Line: + line_num: int + src_file: str + parts: list[str] + original_parts: list[str] + +@dataclass +class Result2: + lines: list[Result2Line] + operations: OpExpansionDict + +def pass_2(result1: Result1) -> Result2: + result_lines: list[Result2Line] = [] + + for line in result1.lines: + keyword, *args = line.parts + if keyword in result1.operations: + fn = result1.operations[keyword] + output: list[list[str]] = fn(*args) + else: + output = [line.parts] + + for (idx, parts) in enumerate(output): + result_lines.append(Result2Line( + line_num=line.line_num, + src_file=line.src_file, + parts=parts, + original_parts=line.parts if idx == 0 else ["..."] + )) + + return Result2( + operations=result1.operations, + lines=result_lines + ) diff --git a/atk16_asm/asm_pass3.py b/atk16_asm/asm_pass3.py new file mode 100644 index 0000000..9c8cb34 --- /dev/null +++ b/atk16_asm/asm_pass3.py @@ -0,0 +1,78 @@ +from dataclasses import dataclass +from asm_ops import * +from asm_eval import * +from asm_pass2 import * + +@dataclass +class Result3Line: + line_num: int + src_file: str + address: int + parts: list[str] + original_parts: list[str] + +@dataclass +class Result3: + lines: list[Result3Line] + operations: OpExpansionDict + symbols: dict[str, int] + +def pass_3(result2: Result2) -> Result3: + result_lines: list[Result3Line] = [] + symbols: dict[str, int] = {} + address = 0 + + for line in result2.lines: + keyword, *args = line.parts + match keyword: + case "@address": + address = eval_expr(symbols, args[0]) + continue + case "@label": + label = args[0] + if label in symbols: + raise Exception(f"When defining label {label} as {address:>04x}, symbol {label} already defined as {symbols[label]:>04x}") + symbols[args[0]] = address + continue + case "@let": + symbols[args[0]] = eval_expr(symbols, args[1]) + continue + case _: + result_lines.append(Result3Line( + line_num=line.line_num, + src_file=line.src_file, + parts=line.parts, + address=address, + original_parts=line.original_parts, + )) + address += 1 + + result_lines.sort(key=lambda l: l.address) + for result_line in result_lines: + rows_with_same_addr = list(filter(lambda l: l.address == result_line.address, result_lines)) + n = len(rows_with_same_addr) + if n > 1: + formatted = format_overlapping_rows(rows_with_same_addr) + raise Exception(f"Overlapping segments: address 0x{result_line.address:>04x} has conflicting definitions:\n{formatted}") + return Result3( + operations=result2.operations, + lines=result_lines, + symbols=symbols, + ) + +def format_overlapping_rows(rows: list[Result3Line]) -> str: + longest_val = 0 + for row in rows: + joined = " ".join(row.parts) + if len(joined) > longest_val: + longest_val = len(joined) + + first_col_width = longest_val + 4 + + results: list[str] = [] + for row in rows: + joined = " ".join(row.parts) + result = joined + (first_col_width - len(joined)) * " " + f" ({row.src_file}:{row.line_num})" + results.append(result) + + return "\n".join(results) diff --git a/atk16_asm/asm_pass4.py b/atk16_asm/asm_pass4.py new file mode 100644 index 0000000..2fff870 --- /dev/null +++ b/atk16_asm/asm_pass4.py @@ -0,0 +1,61 @@ +from dataclasses import dataclass +from asm_ops import * +from asm_eval import * +from asm_pass3 import * + +@dataclass +class Result4Line: + line_num: int + src_file: str + address: int + word: int + text: str + original_text: str + +@dataclass +class Result4: + lines: list[Result4Line] + operations: OpExpansionDict + symbols: dict[str, int] + +def pass_4(result3: Result3) -> Result4: + result_lines: list[Result4Line] = [] + + for line in result3.lines: + keyword, *args = line.parts + meta = Meta( + address=line.address, + ) + + text = " ".join([keyword, *args]) + original_text = " ".join(line.original_parts) + + if keyword in operations: + fn = operations[keyword] + word = fn(meta, result3.symbols, *args) + result_lines.append(Result4Line( + line_num=line.line_num, + src_file=line.src_file, + address=line.address, + word=word, + text=text, + original_text=original_text, + )) + else: + try: + result_lines.append(Result4Line( + line_num=line.line_num, + src_file=line.src_file, + address=line.address, + word=eval_expr(result3.symbols, keyword), + text=text, + original_text=original_text, + )) + except: + raise Exception(f"Invalid assembly at {line.src_file}:{line.line_num + 1}\n\n{line}") + + return Result4( + operations=result3.operations, + symbols=result3.symbols, + lines=result_lines, + ) diff --git a/atk16_asm/assembler.py b/atk16_asm/assembler.py new file mode 100755 index 0000000..c678ba0 --- /dev/null +++ b/atk16_asm/assembler.py @@ -0,0 +1,82 @@ +#!/usr/bin/env python3 +# Assemble ATK16 assembly to bytecode + +import sys +from asm_ops import * +from asm_eval import * +from asm_pass0 import pass_0 +from asm_pass1 import pass_1 +from asm_pass2 import pass_2 +from asm_pass3 import pass_3 +from asm_pass4 import pass_4 + +if len(sys.argv) != 3: + print("usage: assembler.py # read from file") + print(" assembler.py - # read from stdin") + sys.exit(1) + +infile_path = sys.argv[1] +outfile_path = sys.argv[2] + +src = "" +if (infile_path == "-"): + for line in sys.stdin: + src += line +else: + with open(infile_path, "r") as f: + src = f.read() + +src_lines = src.splitlines() + +### Utils + +def parse(line: str) -> list[str]: + depth = 0 + result: list[str] = [] + acc: str = "" + for c in line: + if c.isspace() and depth == 0: + result.append(acc) + acc = "" + elif c == "(": + depth += 1 + acc += "(" + elif c == ")": + depth -= 1 + acc += ")" + else: + acc += c + + result.append(acc) + return list(filter(lambda x: len(x) > 0, result)) + +result0 = pass_0(src_lines, infile_path) +result1 = pass_1(result0) +result2 = pass_2(result1) +result3 = pass_3(result2) +result4 = pass_4(result3) + +nop = bytearray([0b1000_0000, 0]) +result = bytearray() +# initially one nop +result.extend(nop) + +for line in result4.lines: + for (symbol, symbol_value) in result4.symbols.items(): + if line.address == symbol_value: + print(f"{symbol}:") + + if len(result) < 2 * line.address + 1: + result.extend((2 * line.address + 1 - len(result)) * nop) + + out_line = f"{line.address:>08x} 0x{line.word:>04x} {line.text}" + out_spaces_n = (42 - len(out_line)) + out_spaces = out_spaces_n * " " if out_spaces_n > 0 else 4 * " " + print(f"{out_line}{out_spaces}{line.original_text}") + result[2 * line.address + 0] = ((line.word >> 8) & 0xff) + result[2 * line.address + 1] = ((line.word >> 0) & 0xff) + +with open(outfile_path, "wb") as f: + f.write(result) + +print(f"Wrote {len(result)} bytes to {outfile_path}") diff --git a/atk16_asm/optimizer.py b/atk16_asm/optimizer.py new file mode 100644 index 0000000..0ee2837 --- /dev/null +++ b/atk16_asm/optimizer.py @@ -0,0 +1,189 @@ +from tokenizer import tokenize + +def format_asm_row(asm: str) -> str: + if not (asm.startswith("@") or asm.startswith(";")) and not asm.startswith(" ") and len(asm) > 0: + return " " + asm + else: + return asm + +class Optimizer: + def __init__(self): + pass + + def optimize(self, asm_str: str): + asm = asm_str.split("\n") + asm = [row.strip() for row in asm] + asm = [self.strip_comment(row) for row in asm] + asm = [row for row in asm if not len(row) == 0] + asm = [tokenize(row, retain_curlies=True) for row in asm] + asm = self.compact_spu_spo_pattern(asm) + + # TODO: not safe when setting loading SP and FP + # ldr RA SP + # mov RA FP + # gets optimized to + # ldr RA FP + #asm = self.compact_target_mov_pattern(asm) + #asm = self.compact_target_mov_pattern(asm) + + # TODO: not safe at all. E.g. breaks a while True: pass loop + #asm = self.compact_mov_source_pattern(asm) + #asm = self.compact_mov_source_pattern(asm) + + asm = self.compact_spu_load_spo_pattern(asm) + # asm = self.convert_alr_to_ali(asm) + result = "\n".join([format_asm_row(" ".join(row)) for row in asm]) + + return result + + def strip_comment(self, row: str): + ret: str = "" + for c in row: + if c == ";": break + ret += c + + return ret + + def compact_spu_spo_pattern(self, asm: list[list[str]]) -> list[list[str]]: + i = 0 + result: list[list[str]] = [] + while i < len(asm): + current = asm[i] + next = asm[i + 1] if i + 1 < len(asm) else None + i += 1 + if current[0].startswith("@") or next is None: + result.append(current) + continue + + if current[0] == "spu" and next[0] == "spo": + print("=== compact_spu_spo_pattern") + print(current) + print(next) + + arg_current = current[1] + arg_next = next[1] + + print("=== arg_current:", arg_current) + print("=== arg_next:", arg_next) + + if arg_current == arg_next: + print("=== pass") + pass # remove both spu and spo + else: + print("=== mov") + mov = ["mov", arg_current, arg_next] + result.append(mov) + print("=== mov:", mov) + + print("=== last of result:", result[len(result) - 1]) + print() + i += 1 + continue + + result.append(current) + + return result + + def compact_target_mov_pattern(self, asm: list[list[str]]) -> list[list[str]]: + ops_with_target = ["ldi", "ldr", "add", "sub", "addi", "subi", "and", "or", "xor", "sll", "slr", "sar", "slli", "slri", "sari", "inc", "dec", "mov", "ali", "alr", "lpc"] + i = 0 + result: list[list[str]] = [] + while i < len(asm): + current = asm[i] + next = asm[i + 1] if i + 1 < len(asm) else None + i += 1 + if current[0].startswith("@") or next is None: + result.append(current) + continue + + if current[0] in ops_with_target and next[0] == "mov": + + op_op, op_operands, op_target_reg = current[0], current[1:len(current) - 1], current[len(current) - 1] + mov_from_reg, mov_to_reg = next[1], next[2] + + if op_target_reg == mov_from_reg: + ret = [op_op, *op_operands, mov_to_reg] + result.append(ret) + i += 1 + continue + + result.append(current) + + return result + + def compact_mov_source_pattern(self, asm: list[list[str]]) -> list[list[str]]: + ops_with_source = ["str", "ldr", "add", "sub", "addi", "subi", "and", "or", "xor", "sll", "slr", "sar", "slli", "slri", "sari", "mov", "ali", "alr"] + i = 0 + result: list[list[str]] = [] + while i < len(asm): + current = asm[i] + next = asm[i + 1] if i + 1 < len(asm) else None + i += 1 + if current[0].startswith("@") or next is None: + result.append(current) + continue + + if current[0] == "mov" and next[0] in ops_with_source: + mov_from_reg, mov_to_reg = current[1], current[2] + op_op, op_source_reg, op_operands = next[0], next[1], next[2:] + + if op_source_reg == mov_to_reg: + ret = [op_op, op_source_reg, *op_operands] + result.append(ret) + i += 1 + continue + + result.append(current) + + return result + + def compact_spu_load_spo_pattern(self, asm: list[list[str]]) -> list[list[str]]: + # spu RA + # ldi int_7 RA + # ldr RA RB + # spo RA + # OR + # spu RA + # ldi 3 RB + # spo RA + + i = 0 + result: list[list[str]] = [] + while i < len(asm): + instr0 = asm[i] + instr1 = asm[i + 1] if i + 1 < len(asm) else None + instr2 = asm[i + 2] if i + 2 < len(asm) else None + instr3 = asm[i + 3] if i + 3 < len(asm) else None + i += 1 + if instr0[0].startswith("@") or instr1 is None or instr2 is None or instr3 is None: + result.append(instr0) + continue + + if instr0[0] == "spu" and instr1[0] == "ldi" and instr2[0] == "ldr" and instr3[0] == "spo": + spu_op, spu_reg = instr0 + ldi_op, ldi_imm, ldi_target_reg = instr1 + ldr_op, ldr_from_reg, ldr_to_reg = instr2 + spo_op, spo_reg = instr3 + + if spu_reg == spo_reg and ldi_target_reg == ldr_from_reg and ldr_from_reg != ldr_to_reg: + ret0 = f"ldi {ldi_imm} {ldr_to_reg}".split() + ret1 = f"ldr {ldr_to_reg} {ldr_to_reg}".split() + result.append(ret0) + result.append(ret1) + i += 3 + continue + + elif instr0[0] == "spu" and instr1[0] == "ldi" and instr2[0] == "spo": + spu_op, spu_reg = instr0 + ldi_op, ldi_imm, ldi_target_reg = instr1 + spo_op, spo_reg = instr2 + + if spu_reg == spo_reg and ldi_target_reg != spu_reg: + ret0 = f"ldi {ldi_imm} {ldi_target_reg}".split() + result.append(ret0) + i += 2 + continue + + result.append(instr0) + + return result diff --git a/atk16_asm/tokenizer.py b/atk16_asm/tokenizer.py new file mode 100644 index 0000000..cf31b56 --- /dev/null +++ b/atk16_asm/tokenizer.py @@ -0,0 +1,47 @@ +def tokenize(line: str, retain_curlies = False) -> list[str]: + cur: str = "" + result: list[str] = [] + is_py_expr = False + is_string = False + idx = 0 + while idx < len(line): + c = line[idx] + if not is_py_expr and c == "$": + is_py_expr = True + if retain_curlies: + cur += "${" + idx += 1 + elif is_py_expr and c == "$": + raise Exception("Unexpected start of python expr while already parsing a python expression:\n" + line) + elif not is_py_expr and c == "}": + raise Exception("Unexpected end of python expr while not parsing a python expression:\n" + line) + elif is_py_expr and c == "}": + is_py_expr = False + if retain_curlies: + cur += c + result.append(cur) + cur = "" + elif is_py_expr: + cur += c + elif not is_string and c == "\"": + cur += "\"" + is_string = True + elif is_string and c == "\"": + cur += "\"" + is_string = False + result.append(cur) + cur = "" + elif is_string: + cur += c + elif c == " " or c == "\t": + result.append(cur) + cur = "" + else: + cur += c + + idx += 1 + + if len(cur) > 0: + result.append(cur) + + return [r for r in result if r != ""] \ No newline at end of file diff --git a/atk16_ast_walking_compiler/compiler.py b/atk16_ast_walking_compiler/compiler.py new file mode 100644 index 0000000..1634bed --- /dev/null +++ b/atk16_ast_walking_compiler/compiler.py @@ -0,0 +1,716 @@ +#!/usr/bin/env python3 +# Generate .atk16 assembly from a subset of Python + +import sys +import ast + +from dataclasses import dataclass +from typing import Literal, Set, cast, Any, TypeAlias, TypeVar +from collections import OrderedDict + + +if len(sys.argv) != 3: + print("usage: compiler.py ") + sys.exit(1) + +infile_path = sys.argv[1] +outfile_path = sys.argv[2] + +Label = str +StackOffset = int +RegChar = Literal["A", "B", "C", "D", "E", "F", "G", "H"] + +@dataclass +class Reg(): + reg: RegChar + + def __str__(self): + return f"R{self.reg}" + +ALL_REGS: list[RegChar] = ["A", "B", "C", "D", "E", "F", "G", "H"] +FRAME_POINTER_REG_CHAR: RegChar = "G" # points to base of stack frame +FRAME_POINTER_REG = Reg(FRAME_POINTER_REG_CHAR) +STACK_POINTER_REG_CHAR: RegChar = "H" +STACK_POINTER_REG = Reg(STACK_POINTER_REG_CHAR) +SPECIAL_REGS: list[RegChar] = [FRAME_POINTER_REG_CHAR, STACK_POINTER_REG_CHAR] +GENERIC_REGS: OrderedDict[RegChar, None] = OrderedDict() +for char in ALL_REGS: + if char not in SPECIAL_REGS: + GENERIC_REGS[cast(RegChar, char)] = None + +def format_asm_row(asm: str) -> str: + if not (asm.startswith("@") or asm.startswith(";")) and not asm.startswith(" ") and len(asm) > 0: + return " " + asm + else: + return asm + +class Compiler(ast.NodeVisitor): + def __init__(self): + self.const_asm: list[str] = [] + self.program_asm: list[str] = [ + "@label main" + ] + self.function_def_asms: list[str] = [] + self.currently_emitting_asm_list = self.program_asm + + self.local_bindings: dict[str, StackOffset] = {} + self.const_bindings: dict[str, Label] = {} + + self.unique_name_counter = 0 + self.latest_break_target: Label | None = None + + self.reserved_regs: OrderedDict[RegChar, None] = OrderedDict() + + def get_unique_name(self, prefix: str): + ret = f"{prefix}_{self.unique_name_counter}" + self.unique_name_counter += 1 + return ret + + def assign_const(self, name: str, value: int): + prev_currently_emitting_asm_list = self.currently_emitting_asm_list + self.currently_emitting_asm_list = self.const_asm + + self.emit_label(name) + self.emit(f"{value}") + + self.const_bindings[name] = name + + self.currently_emitting_asm_list = prev_currently_emitting_asm_list + + def emit(self, asm: str): + asm = asm.strip() + asm = format_asm_row(asm) + + self.currently_emitting_asm_list.append(asm) + + def emit_label(self, label_name: str): + label_name = label_name.lower() + self.emit(f"@label {label_name}") + + def alloc_reg(self) -> Reg: + for reg in GENERIC_REGS: + if not reg in self.reserved_regs: + self.reserved_regs[reg] = None + return Reg(reg) + + raise Exception("Ran out of registers, TODO use stack") + + def free_reg(self, reg: Reg): + self.reserved_regs.pop(reg.reg) + + class RegContextManager: + def __init__(self, compiler): + self.compiler = compiler + + def __enter__(self) -> Reg: + self.reg = self.compiler.alloc_reg() + return self.reg + + def __exit__(self, exc_type, exc_value, exc_tb): + self.compiler.free_reg(self.reg) + + def allocated_reg(self): + return Compiler.RegContextManager(self) + + def compile(self, bootstrap_asm: str, source: str) -> str: + tree = ast.parse(source) + print(ast.dump(tree, indent=4)) + self.visit(tree) + return "\n".join([ + bootstrap_asm, + "", + "\n".join(self.const_asm), + "", + "\n".join(self.function_def_asms), + "", + "\n".join(self.program_asm), + "" + ]) + + def generic_visit(self, node: ast.AST) -> Any: + raise NotImplementedError(f"type {type(node)}, value: {node}") + + def emit_builtin_call(self, name: str, args: list[ast.expr]): + self.emit(f"; Builtin call {name} {args}") + match name: + case "asm": + match args: + case [ast.Constant(str(value))]: + self.emit(value) + + # return None + with self.allocated_reg() as arg: + self.emit(f"ldi 0 {arg}") + self.emit(f"spu {arg}") + + case other: raise Exception(f"asm: invalid args: {other}") + + case "store": + if len(args) != 2: + raise Exception("Invalid number of arguments to store: " + str(len(args))) + + # Evaluate args before call + for arg in args: + self.visit(arg) + + with self.allocated_reg() as arg1, self.allocated_reg() as arg2: + self.emit(f"spo {arg2}") + self.emit(f"spo {arg1}") + self.emit(f"str {arg2} {arg1}") + + # return None + self.emit(f"ldi 0 {arg1}") + self.emit(f"spu {arg1}") + + case "load": + if len(args) != 1: + raise Exception("Invalid number of arguments to load: " + str(len(args))) + + self.visit(args[0]) + + self.emit("; (load) dereferencing top of stack") + with self.allocated_reg() as arg: + self.emit(f"spo {arg}") + self.emit(f"ldr {arg} {arg}") + self.emit(f"spu {arg}") + + case "ord": + if len(args) != 1: + raise Exception("Invalid number of arguments to ord: " + str(len(args))) + + self.visit(args[0]) + + case other: + raise Exception(f"Unknown builtin: {other}") + + def eval_int_constant_and_spu(self, value: int): + with self.allocated_reg() as reg: + if value >= 0 and value < 8: + self.emit(f"ldi {value} {reg}") + else: + name = self.get_unique_name("int") + self.assign_const(name, value) + self.emit(f"ldi {name} {reg}") + self.emit(f"ldr {reg} {reg} ; {name} = {value}") + + self.emit(f"spu {reg}") + + def emit_add_imm(self, reg1: str, addend: int, target_reg: str): + if addend >= 0 and addend < 8: + self.emit(f"addi {reg1} {addend} {target_reg}") + else: + name = self.get_unique_name("int") + self.assign_const(name, addend) + + with self.allocated_reg() as addend_reg: + self.emit(f"ldi {name} {addend_reg}") + self.emit(f"ldr {addend_reg} {addend_reg}") + self.emit(f"add {reg1} {addend_reg} {target_reg}") + + def visit_Module(self, node: ast.Module): + stmts = node.body + frame_names = self.collect_local_variables(stmts) + + self.emit("; stack frame with offsets") + for offset, name in enumerate(frame_names): + self.local_bindings[name] = offset + self.emit(f"; {name} {offset}") + + self.emit_add_imm("SP", len(frame_names), "SP") + + for stmt in stmts: + if type(stmt) == ast.Expr and type(stmt.value) != ast.Call: + self.emit("; NOP top-level expression") + continue + + self.visit(stmt) + + self.emit(f"mov FP SP") + self.emit("hlt") + + def visit_Expr(self, expr: ast.Expr): + self.visit(expr.value) + + with self.allocated_reg() as reg: + self.emit("; popping free-standing Expr result from stack") + self.emit(f"spo {reg}") + + def visit_UnaryOp(self, node: ast.UnaryOp): + self.emit(f"; {node.op}") + self.visit(node.operand) + match node.op: + case ast.Not(): + with self.allocated_reg() as reg1, self.allocated_reg() as reg2: + self.emit(f"spo {reg1}") + self.emit(f"ldi 1 {reg2}") + self.emit(f"andi {reg1} 1 {reg1}") + self.emit(f"xor {reg1} {reg2} {reg1}") + self.emit(f"spu {reg1}") + + case ast.Invert(): # aka bitwise not + with self.allocated_reg() as reg1: + self.emit(f"spo {reg1}") + self.emit(f"not {reg1}") + self.emit(f"spu {reg1}") + + case ast.UAdd(): # +a + pass # nop + + case ast.USub(): # -a + with self.allocated_reg() as reg1: + self.emit(f"spo {reg1}") + self.emit(f"not {reg1}") + self.emit(f"addi {reg1} 1 {reg1}") + self.emit(f"spu {reg1}") + + case other: + raise NotImplementedError(f"Unhandled UnaryOp: {other}") + + def visit_BoolOp(self, node: ast.BoolOp): + self.emit(f"; {node.op}") + + match node.op: + case ast.And(): + label_short_circuit = self.get_unique_name("And_short_circuit") + + with self.allocated_reg() as reg: + for arg in node.values: + self.emit(f"; And operand {arg}") + self.visit(arg) + + self.emit(f"spo {reg}") + self.emit(f"addi {reg} 0 {reg}") + self.emit(f"bri zero {label_short_circuit}") + + self.emit_label(label_short_circuit) + self.emit(f"spu {reg}") + + case ast.Or(): + label_short_circuit = self.get_unique_name("Or_short_circuit") + + with self.allocated_reg() as reg1, self.allocated_reg() as reg2: + for arg in node.values: + self.emit(f"; Or operand {arg}") + self.visit(arg) + + self.emit(f"spo {reg1}") + self.emit(f"subi {reg1} 1 {reg2}") + self.emit(f"bri carry {label_short_circuit}") + + self.emit_label(label_short_circuit) + self.emit(f"spu {reg1}") + + case other: + raise NotImplementedError(f"Unhandled BoolOp: {other}") + + def visit_BinOp(self, node: ast.BinOp): + self.emit(f"; {node.op}") + + self.emit(f"; BinOp lhs {node}") + self.visit(node.left) + self.emit(f"; BinOp rhs {node}") + self.visit(node.right) + + with self.allocated_reg() as reg1, self.allocated_reg() as reg2: + self.emit(f"spo {reg2}") + self.emit(f"spo {reg1}") + + match node.op: + case ast.Add(): + self.emit(f"add {reg1} {reg2} {reg1}") + case ast.Sub(): + self.emit(f"sub {reg1} {reg2} {reg1}") + case ast.BitAnd(): + self.emit(f"and {reg1} {reg2} {reg1}") + case ast.BitOr(): + self.emit(f"or {reg1} {reg2} {reg1}") + case ast.BitXor(): + self.emit(f"xor {reg1} {reg2} {reg1}") + case ast.LShift(): + self.emit(f"sll {reg1} {reg2} {reg1}") + case ast.RShift(): + self.emit(f"slr {reg1} {reg2} {reg1}") + case other: + raise NotImplementedError(f"Unhandled BinOp: {other}") + + self.emit(f"spu {reg1}") + + def visit_Constant(self, node: ast.Constant): + self.emit(f"; {node}") + match node.value: + case bool(value): + int_value = 1 if value else 0 + self.eval_int_constant_and_spu(int_value) + case int(value): + self.eval_int_constant_and_spu(value) + case str(value): + if len(value) > 1: + raise Exception("Invalid string, only single char values allowed: " + value) + + c = value[0] + int_value = ord(c) + self.eval_int_constant_and_spu(int_value) + case other: + raise NotImplementedError(f"Unhandled Constant: {other}") + + def visit_If(self, node: ast.If): + self.emit(f"; {node}") + + self.visit(node.test) + label_false = self.get_unique_name("If_false_branch") + label_end = self.get_unique_name("If_end_branch") + + with self.allocated_reg() as reg: + self.emit(f"spo {reg}") + self.emit(f"addi {reg} 0 {reg}") + self.emit(f"bri zero {label_false}") + + for true_branch_stmt in node.body: + if type(true_branch_stmt) == ast.Expr and type(true_branch_stmt.value) != ast.Call: + self.emit("; NOP top-level expression") + continue + + self.visit(true_branch_stmt) + + self.emit(f"jpi {label_end}") + self.emit_label(label_false) + + for false_branch_stmt in node.orelse: + if type(false_branch_stmt) == ast.Expr and type(false_branch_stmt.value) != ast.Call: + self.emit("; NOP top-level expression") + continue + + self.visit(false_branch_stmt) + + self.emit_label(label_end) + + def visit_Compare(self, node: ast.Compare): + self.emit(f"; {node}") + + if len(node.ops) > 1: + raise Exception("Multiple compare ops not supported") + + if len(node.comparators) > 1: + raise Exception("Multiple comparators not supported") + + op = node.ops[0] + left = node.left + right = node.comparators[0] + + label_true = self.get_unique_name("Compare_true") + label_end = self.get_unique_name("Compare_end") + + self.visit(left) + self.visit(right) + + self.emit(f"; Comparing {left} {op} {right}") + with self.allocated_reg() as reg_lhs, self.allocated_reg() as reg_rhs: + match op: + case ast.Lt(): # lhs < rhs + self.emit(f"spo {reg_rhs}") + self.emit(f"spo {reg_lhs}") + + self.emit(f"sub {reg_lhs} {reg_rhs} {reg_lhs}") + self.emit(f"bri carry {label_true}") + + # false branch + self.emit(f"ldi 0 {reg_lhs}") + self.emit(f"spu {reg_lhs}") + self.emit(f"jpi {label_end}") + + # true branch + self.emit_label(label_true) + self.emit(f"ldi 1 {reg_lhs}") + self.emit(f"spu {reg_lhs}") + + self.emit_label(label_end) + + def visit_While(self, node: ast.While): + self.emit(f"; {node}") + + label_test = self.get_unique_name("While_test") + label_else = self.get_unique_name("While_else") + label_end = self.get_unique_name("While_end") + + prev_break_target = self.latest_break_target + self.latest_break_target = label_end + + with self.allocated_reg() as reg: + self.emit_label(label_test) + self.visit(node.test) + self.emit(f"spo {reg}") + self.emit(f"addi {reg} 0 {reg}") + self.emit(f"bri zero {label_else}") + + for body_stmt in node.body: + if type(body_stmt) == ast.Expr and type(body_stmt.value) != ast.Call: + self.emit("; NOP top-level expression") + continue + + self.visit(body_stmt) + + self.emit(f"jpi {label_test}") + + self.emit_label(label_else) + + for else_stmt in node.orelse: + self.visit(else_stmt) + + self.emit_label(label_end) + + self.latest_break_target = prev_break_target + + def visit_Pass(self, node: ast.Pass): + self.emit(f"; {node}") + pass + + def visit_Break(self, node: ast.Break): + self.emit(f"; {node}") + + if self.latest_break_target is None: + raise Exception("Invalid break: no break target defined, i.e. no place to break out to") + + self.emit(f"jpi {self.latest_break_target}") + + def visit_For(self, node: ast.For): + raise Exception("For loops not supported. Consider using a while loop instead.") + + def visit_Lambda(self, node: ast.Lambda): + raise Exception("Lambda functions not supported. Consider using a named function instead.") + + def collect_local_variables(self, stmts: list[ast.stmt]): + result: list[str] = [] + symbols: list[str] = [] + for stmt in stmts: + match stmt: + case ast.Assign(targets=[ast.Name(name)]): + symbols.append(name) + case ast.Assign(other): + raise Exception(f"Unsupported assignment in function definition body: {other}") + case ast.While(body=body): + symbols += self.collect_local_variables(body) + case ast.If(body=tb, orelse=fb): + symbols += self.collect_local_variables(tb) + symbols += self.collect_local_variables(fb) + case other: pass + + for symbol in symbols: + if symbol not in result: + result.append(symbol) + + return result + + def visit_FunctionDef(self, node: ast.FunctionDef): + prev_currently_emitting_asm_list = self.currently_emitting_asm_list + self.currently_emitting_asm_list = self.function_def_asms + self.emit(f"; {node}") + + fn_name = node.name + fn_params = [str(param.arg) for param in node.args.args] + fn_stmts = node.body + + # Add a "return None" to the end to make sure the function returns + if len(fn_stmts) == 0 or type(fn_stmts[len(fn_stmts) - 1]) != ast.Return: + fn_stmts.append(ast.Return(value=None)) + + if len(node.args.kwonlyargs) > 0 or len(node.args.posonlyargs) > 0 or len(node.args.kw_defaults) > 0 or len(node.args.defaults) > 0: + raise Exception("Only simple positional args are supported for now in function definitions.") + + self.emit_label(fn_name) + local_var_names = self.collect_local_variables(fn_stmts) + frame_names = fn_params + local_var_names + + # Move stack pointer to accommodate local variables + if len(local_var_names) > 0: + self.emit_add_imm("SP", len(local_var_names), "SP") + + prev_local_bindings = self.local_bindings + self.local_bindings = {} + self.emit("; stack frame with offsets") + for offset, name in enumerate(frame_names): + self.local_bindings[name] = offset + self.emit(f"; {name} {offset}") + + for stmt in fn_stmts: + self.visit(stmt) + + self.local_bindings = prev_local_bindings + self.currently_emitting_asm_list = prev_currently_emitting_asm_list + + def visit_Return(self, node: ast.Return): + self.emit(f"; {node}") + + with self.allocated_reg() as reg1, self.allocated_reg() as reg2: + if node.value is not None: + self.visit(node.value) + else: + self.emit(f"ldi 0 {reg1}") + self.emit(f"spu {reg1}") + + self.emit(f"; return value is on top of stack") + + self.emit(f"; return from function") + self.emit(f"subi FP 1 FP") + self.emit(f"ldr FP {reg2}") + self.emit(f"jpr {reg2}") + + def visit_Call(self, node: ast.Call): + self.emit(f"; {node}") + + match node.func: + case ast.Attribute(ast.Name(id="atk16"), attr): + self.emit_builtin_call(attr, node.args) + case ast.Name(name): + self.emit(f"; Call function {name}") + + # Push the current FP + self.emit("spu FP") + #self.emit("mov SP FP") # BUG: FP needs to be moved AFTER EVALING ARGS! args depend on FP in calling frame if there are names to resolve! + + # Reserve a stack slot for the return address + # FP will point to this slot + with self.allocated_reg() as reg: + self.emit(f"ldi 0 {reg}") + self.emit(f"spu {reg}") + + # Evaluate args before call, pushing them to stack + for arg in node.args: + self.visit(arg) + + self.emit(f"subi SP {1 + len(node.args)} FP") + + with self.allocated_reg() as reg: + self.emit("; set up return address and jump to subroutine") + self.emit(f"lpc {reg}") + self.emit(f"addi {reg} 4 {reg}") # imm must equal number of primitive instrs from lpc until jpi + self.emit(f"str {reg} FP") + self.emit(f"addi FP 1 FP") + self.emit(f"jpi {name}") + # ...after return from call... + self.emit(f"spo {reg}") + + self.emit("mov FP SP") # move stack pointer to base of stack frame, i.e. top of previous frame + self.emit("spo FP") # restore FP of previous frame + self.emit(f"spu {reg}") + + case other: + raise NotImplementedError(f"Unhandled Call: {other}") + + def resolve_name(self, name: str) -> Label | StackOffset: + if name in self.local_bindings: + return self.local_bindings[name] + + if name in self.const_bindings: + return self.const_bindings[name] + + raise Exception(f"{name} is unbound") + + def visit_Name(self, node: ast.Name): + self.emit(f"; {node} ({node.id})") + + name = node.id.lower() + addr = self.resolve_name(name) + + with self.allocated_reg() as reg: + match addr: + case Label(label): + self.emit(f"ldi {label} {reg}") + case StackOffset(offset): + self.emit(f"ldi {offset} {reg}") + self.emit(f"add FP {reg} {reg}") + case other: + raise Exception(f"Unsupported addr value: {other}") + + self.emit(f"ldr {reg} {reg}") + self.emit(f"spu {reg}") + + def visit_Assign(self, node: ast.Assign): + self.emit(f"; {node}") + + targets = node.targets + value = node.value + match targets: + case [ast.Name(name)]: + offset = self.resolve_name(name) + + if type(offset) != StackOffset: + raise Exception(f"Invalid address {offset} for name {name}. Can only assign to stack offsets.") + + self.emit(f"; assigning {name} at FP + {offset}") + + with self.allocated_reg() as reg1, self.allocated_reg() as reg2: + self.emit(f"; evaluating value to be assigned") + self.visit(value) + self.emit(f"; assigning stack address (FP + {offset}) := top of stack") + self.emit(f"spo {reg1}") # value + + self.emit(f"ldi {offset} {reg2}") + self.emit(f"add {reg2} FP {reg2}") # address + self.emit(f"str {reg1} {reg2}") + + case other: + raise Exception(f"Unsupported assign targets: {other}") + + def visit_AugAssign(self, node: ast.AugAssign): + op = node.op + lhs = node.target + rhs = node.value + + if type(lhs) != ast.Name: + raise Exception("AugAssign to non-Name lhs not yet supported!") + + # construct bin op and assignment + bin_op = ast.BinOp(left=lhs, op=op, right=rhs) + assign = ast.Assign(targets=[lhs], value=bin_op) + + self.visit(assign) + + def visit_Import(self, node: ast.Import) -> Any: + match node.names: + case [ast.alias(name="atk16")]: + return + case other: + raise NotImplementedError(f"Unsupported import {other}") + + def visit_AnnAssign(self, node: ast.AnnAssign): + match node: + case ast.AnnAssign( + target=ast.Name(name), + annotation=ast.Attribute( + value=ast.Name(id="atk16"), + attr="ConstWord16"), + value=ast.Constant(value) # TODO: constant folding + ): + if type(value) == int: + self.assign_const(name.lower(), value) + return + + raise NotImplementedError("Unhandled AnnAssign:\n" + ast.dump(node, indent=4)) + + def get_module_exports(self, node: ast.Module): + result: list[str] = [] + for stmt in node.body: + match stmt: + case ast.FunctionDef(name): + result.append(name) + case _: + # only function exported since recognizing which assignments are constants is kinda hard + pass + + return result + +with open(infile_path, "r") as f: + source_py = f.read() + +with open("asm/ast_compiler_bootstrap.atk16", "r") as f: + bootstrap_asm = f.read() + +compiler = Compiler() +asm_out = compiler.compile( + bootstrap_asm, + source_py, +) + +with open(outfile_path, "w") as f: + f.write(asm_out) + diff --git a/atk16_bytecode_compiler/bytecode_compiler.py b/atk16_bytecode_compiler/bytecode_compiler.py new file mode 100644 index 0000000..42cf8dc --- /dev/null +++ b/atk16_bytecode_compiler/bytecode_compiler.py @@ -0,0 +1,220 @@ +#!/usr/bin/env python3 +# Generate .atk16 assembly from Python bytecode + +import sys +import dis + +from dataclasses import dataclass +from typing import Literal, Set, cast, Any +from collections import OrderedDict + +if len(sys.argv) != 3: + print("usage: compiler.py ") + sys.exit(1) + +infile_path = sys.argv[1] +outfile_path = sys.argv[2] + +with open(infile_path, "r") as f: + source_py = f.read() + +compiled_code = compile(source_py, infile_path, 'exec') +disassembled = dis.get_instructions(compiled_code) + +co_consts = compiled_code.co_consts +co_names = compiled_code.co_names +print("### Constants") +print(co_consts) +print("\n### Names") +print(co_names) +print("\n### Instructions") +instrs: list[tuple[str, int | None]] = [] +for instr in disassembled: + print(f"{instr.opname}\t{instr.arg}") + instrs.append((instr.opname, instr.arg)) + +### compile +asm_out: list[str] = [] +def emit(stmt: str) -> int: + ret = len(asm_out) + asm_out.append(stmt) + return ret + +_counter = 0 +def get_unique_name(prefix: str): + global _counter + ret = f"{prefix}_{_counter}" + _counter += 1 + return ret + +@dataclass +class Label: + label: str + + def __str__(self): + return f"@label {self.label}" + +RegChar = Literal["A", "B", "C", "D", "E", "F", "G", "H"] +GENERIC_REGS_LST: list[RegChar] = ["A", "B", "C", "D", "E", "F"] +GENERIC_REGS: OrderedDict[RegChar, None] = OrderedDict() +for char in GENERIC_REGS_LST: + GENERIC_REGS[cast(RegChar, char)] = None + +@dataclass +class Reg: + reg: RegChar + + def __str__(self): + return f"R{self.reg}" + +Value = Label | Reg + +reserved_regs: OrderedDict[RegChar, None] = OrderedDict() +def alloc_reg() -> Reg: + for reg in GENERIC_REGS: + if not reg in reserved_regs: + reserved_regs[reg] = None + return Reg(reg) + + raise Exception("Ran out of registers, TODO use stack") + +def free_reg(reg: Reg): + reserved_regs.pop(reg.reg) + +def emit_serialize_const(const: Any): + match const: + case int(v): + emit(f" {v}") + case str(v): + if len(v) > 1: + raise Exception("Cannot serialize const string: " + v) + + emit(f" {ord(v[0])}") + case _: + print(f"warn: cannot serialize {type(const)} ({const}), emitting zero") + emit(" 0") + +STACK_POINTER_REG = Reg('H') +emit(f"@let SP {STACK_POINTER_REG}") +emit("@use ext_std:*") +emit("@include bootstrap") + +py_consts_addr = emit("@label py_consts") + +for const_i, const in enumerate(co_consts): + emit(f"; {const_i}: {const}") + emit_serialize_const(const) + +emit("@label atk_store") +_reg_value = alloc_reg() +_reg_addr = alloc_reg() +emit(f" str RB RA") +emit(f" rsr") +free_reg(_reg_value) +free_reg(_reg_addr) + +emit("@label atk_enable_text_mode") +emit(" set_graphics_mode gr_text_mode") +emit(" rsr") + +emit("@label main") + +instr_i = 0 + +def instr_pop(): + global instr_i + ret = instrs[instr_i] + instr_i += 1 + return ret + +def instr_pop_expect(opcode: str, arg: int | None = -1): + ret_op, ret_arg = instr_pop() + if ret_op != opcode: + raise Exception(f"Expected opcode {opcode}, got {ret_op}") + if arg != -1 and arg != ret_arg: + raise Exception(f"Expected instruction arg {arg}, got {ret_arg}") + return ret_op, ret_arg + +def instr_peek(): + return instrs[instr_i] + +def instr_peek_expect(opcode: str, arg: int | None = -1): + ret_op, ret_arg = instr_peek() + if ret_op != opcode: + raise Exception(f"Expected {opcode}, got {ret_op}") + if arg != -1 and arg != ret_arg: + raise Exception(f"Expected instruction arg {arg}, got {ret_arg}") + return ret_op, ret_arg + +instr_pop_expect("RESUME") +instr_pop_expect("LOAD_CONST", 0) +instr_pop_expect("LOAD_CONST", 1) +instr_pop_expect("IMPORT_NAME", 0) +instr_pop_expect("IMPORT_STAR", None) + +while instr_i < len(instrs): + opcode, arg = instr_pop() + emit(f"; {opcode} {arg}") + match opcode: + case "LOAD_CONST": + reg = alloc_reg() + emit(f" ldi ${{py_consts + {cast(int, arg)}}} {reg}") + emit(f" ldr {reg} {reg}") + emit(f" spu {reg}") + free_reg(reg) + case "PUSH_NULL": + reg = alloc_reg() + emit(f" ldi 0 {reg}") + emit(f" spu {reg}") + free_reg(reg) + case "LOAD_NAME": + name = co_names[cast(int, arg)] + reg = alloc_reg() + emit(f" ldi {name} {reg}") + emit(f" spu {reg}") + free_reg(reg) + case "CALL": + arg_count = cast(int, arg) + # if arg_count > len(GENERIC_REGS_LST): + # raise Exception(f"Function calls with > {len(GENERIC_REGS_LST)} arguments not supported") + + regs_to_restore: list[tuple[Reg, Reg]] = [] + for j in range(arg_count): + i = arg_count - j - 1 + ith_reg_char = GENERIC_REGS_LST[i] + ith_reg = Reg(ith_reg_char) + if ith_reg_char in reserved_regs: + reg = alloc_reg() + emit(f" mov {ith_reg} {reg}") + regs_to_restore.append((reg, ith_reg)) + + emit(f" spo {ith_reg}") + reserved_regs[ith_reg_char] = None # manually reserve ith_reg + + fn_reg = alloc_reg() + emit(f" spo {fn_reg}") + # emit(f" ldr {fn_reg} {fn_reg}") + emit(f" csr {fn_reg}") + free_reg(fn_reg) + + for from_reg, ith_reg in regs_to_restore: + emit(f" mov {from_reg} {ith_reg}") + + for j in range(arg_count): + i = arg_count - j - 1 + ith_reg_char = GENERIC_REGS_LST[i] + ith_reg = Reg(ith_reg_char) + free_reg(ith_reg) + + case "POP_TOP": + reg = alloc_reg() + emit(f" spo {reg}") + free_reg(reg) + case _: + print(f"Skipping not implemented opcode: {opcode}") + +emit("@label keep_alive") +emit(" jpi keep_alive") + +with open(outfile_path, "w") as f: + f.write("\n".join(asm_out)) diff --git a/atk16_syntax/README.md b/atk16_syntax/README.md new file mode 100644 index 0000000..da81144 --- /dev/null +++ b/atk16_syntax/README.md @@ -0,0 +1,9 @@ +# VSCode syntax highlighting extension for ATK16 assembly + +## Installation + +In `atk16-syntax-highlighting` directory, run: + + npx @vscode/vsce package + +Then go to VSCode > Command Palette > Extensions: Install from VSIX and select the generated `.vsix` file. diff --git a/atk16_syntax/atk16-syntax-0.0.1.vsix b/atk16_syntax/atk16-syntax-0.0.1.vsix new file mode 100644 index 0000000..253d326 Binary files /dev/null and b/atk16_syntax/atk16-syntax-0.0.1.vsix differ diff --git a/atk16_syntax/extension.js b/atk16_syntax/extension.js new file mode 100644 index 0000000..26b4d9d --- /dev/null +++ b/atk16_syntax/extension.js @@ -0,0 +1,196 @@ +const vscode = require('vscode'); +const path = require('path'); + +class ATK16HoverProvider { + async provideHover(document, position, token) { + const range = document.getWordRangeAtPosition(position, /[\w-/.]+/); + const labelText = document.getText(range); + const subroutineDefinition = await findSubroutineInDocument(document, labelText); + if (subroutineDefinition) { + const hoverText = new vscode.MarkdownString(subroutineDefinition); + hoverText.isTrusted = true; + return new vscode.Hover(hoverText); + } + + // Search for labels in included files + for (let i = 0; i < document.lineCount; i++) { + const line = document.lineAt(i); + const includeMatch = line.text.match(/@include\s+(\S+)/); + if (includeMatch) { + const includedFilePath = path.join( + path.dirname(document.fileName), + `${includeMatch[1]}.atk16` + ); + + if (await vscode.workspace.fs.stat(vscode.Uri.file(includedFilePath))) { + const includedDocument = await vscode.workspace.openTextDocument( + includedFilePath + ); + const subroutineDefinition = await findSubroutineInDocument(includedDocument, labelText); + if (subroutineDefinition) { + const hoverText = new vscode.MarkdownString(subroutineDefinition); + hoverText.isTrusted = true; + return new vscode.Hover(hoverText); + } + } + } + } + + return null; + } +} + +class ATK16DefinitionProvider { + async provideDefinition(document, position, token) { + const range = document.getWordRangeAtPosition(position, /[\w-/.]+/); + const text = document.getText(range); + + const line = document.lineAt(position); + const includeMatch = line.text.match(/@include\s+(\S+)/); + const useMatch = line.text.match(/@use\s+(\S+):/); + + if (includeMatch && includeMatch[1] === text) { + const includedFilePath = path.join( + path.dirname(document.fileName), + `${includeMatch[1]}.atk16` + ); + + try { + await vscode.workspace.fs.stat(vscode.Uri.file(includedFilePath)); + return new vscode.Location( + vscode.Uri.file(includedFilePath), + new vscode.Position(0, 0) + ); + } catch (err) { + vscode.window.showErrorMessage( + `ATK16: File not found: ${includedFilePath}` + ); + } + } else if (useMatch && useMatch[1] === text) { + const includedFilePath = path.join( + path.dirname(document.fileName), + `${useMatch[1]}.py` + ); + + try { + await vscode.workspace.fs.stat(vscode.Uri.file(includedFilePath)); + return new vscode.Location( + vscode.Uri.file(includedFilePath), + new vscode.Position(0, 0) + ); + } catch (err) { + vscode.window.showErrorMessage( + `ATK16: File not found: ${includedFilePath}` + ); + } + } else { + const labelText = document.getText(range); + let definitionLocation = await findDefinitionInDocument(document, labelText); + if (definitionLocation) { + return definitionLocation; + } + + // Search for labels in included files + for (let i = 0; i < document.lineCount; i++) { + const line = document.lineAt(i); + const includeMatch = line.text.match(/@include\s+(\S+)/); + if (includeMatch) { + const includedFilePath = path.join( + path.dirname(document.fileName), + `${includeMatch[1]}.atk16` + ); + + if (await vscode.workspace.fs.stat(vscode.Uri.file(includedFilePath))) { + const includedDocument = await vscode.workspace.openTextDocument( + includedFilePath + ); + definitionLocation = await findDefinitionInDocument(includedDocument, labelText); + if (definitionLocation) { + return definitionLocation; + } + } + } + } + } + + return null; + } +} + +async function findDefinitionInDocument(document, labelText) { + for (let i = 0; i < document.lineCount; i++) { + const line = document.lineAt(i); + if (line.text.includes(`@label ${labelText}`) || line.text.includes(`@let ${labelText}`)) { + return new vscode.Location(document.uri, line.range.start); + } + } + return null; +} + +async function findSubroutineInDocument(document, labelText) { + let name = null; + const params = []; + const returns = []; + let extra = ""; + for (let i = 0; i < document.lineCount; i++) { + const line = document.lineAt(i); + if (line.text.includes(`@label ${labelText}`)) { + for (let j = i + 1; j < document.lineCount; j++) { + const docLine = document.lineAt(j); + const docCommentMatch = docLine.text.match(/;;;\s+(.*)/); + if (docCommentMatch) { + const lineText = docCommentMatch[1]; + const parts = lineText.trim().split(/\s+/g); + if (lineText.startsWith('subroutine')) { + name = parts[parts.length - 1].trim(); + } else if (lineText.startsWith('param')) { + const [_kw, reg, ...desc] = parts; + params.push([reg.trim(), desc.filter(a => a).join(" ")]) + } else if (lineText.startsWith('return')) { + const [_kw, reg, ...desc] = parts; + returns.push([reg.trim(), desc.filter(a => a).join(" ")]) + } else { + extra += `${lineText}\n`; + } + } else { + break; + } + } + } + } + + if (name === null) return null; + + let definition = `### ${name}\n_Subroutine_\n\n`; + definition += extra; + if (params.length > 0) { + definition += "\n\n|Reg|Parameter|\n"; + definition += "|:---|:---|\n"; + } + for (const [reg, desc] of params) { + definition += `|${reg}|${desc}|\n`; + } + + if (returns.length > 0) { + definition += "\n|Reg|Return|\n"; + definition += "|:---|:---|\n"; + } + for (const [reg, desc] of returns) { + definition += `|${reg}|${desc}|\n`; + } + return definition; +} + +function activate(context) { + context.subscriptions.push( + vscode.languages.registerDefinitionProvider('atk16', new ATK16DefinitionProvider()), + vscode.languages.registerHoverProvider('atk16', new ATK16HoverProvider()) + ); +} + +function deactivate() {} + +module.exports = { + activate, + deactivate, +}; \ No newline at end of file diff --git a/atk16_syntax/language-configuration.json b/atk16_syntax/language-configuration.json new file mode 100644 index 0000000..c186b1b --- /dev/null +++ b/atk16_syntax/language-configuration.json @@ -0,0 +1,41 @@ +{ + "comments": { + "lineComment": ";" + }, + "brackets": [ + [ + "{", + "}" + ], + [ + "[", + "]" + ], + [ + "(", + ")" + ] + ], + "autoClosingPairs": [ + [ + "{", + "}" + ], + [ + "[", + "]" + ], + [ + "(", + ")" + ], + [ + "\"", + "\"" + ], + [ + "'", + "'" + ] + ] +} \ No newline at end of file diff --git a/atk16_syntax/package.json b/atk16_syntax/package.json new file mode 100644 index 0000000..6a64b6c --- /dev/null +++ b/atk16_syntax/package.json @@ -0,0 +1,48 @@ +{ + "name": "atk16-syntax", + "displayName": "ATK16 Syntax", + "description": "Syntax highlighting and support for ATK16 assembly language", + "version": "0.0.1", + "publisher": "JanTuomi", + "license": "MIT", + "repository": "", + "engines": { + "vscode": "^1.60.0" + }, + "categories": ["Programming Languages"], + "activationEvents": [ + "onLanguage:atk16" + ], + "main": "./extension.js", + "contributes": { + "languages": [ + { + "id": "atk16", + "aliases": ["ATK16 Assembly", "atk16"], + "extensions": [".atk16"], + "configuration": "./language-configuration.json" + } + ], + "grammars": [ + { + "language": "atk16", + "scopeName": "source.atk16", + "path": "./syntaxes/atk16.tmLanguage.json" + } + ], + "configurationDefaults": { + "editor.tokenColorCustomizations": { + "[Default Dark+]": { + "textMateRules": [ + { + "scope": "comment.documentation.atk16", + "settings": { + "fontStyle": "italic" + } + } + ] + } + } + } + } +} diff --git a/atk16_syntax/syntaxes/atk16.tmLanguage.json b/atk16_syntax/syntaxes/atk16.tmLanguage.json new file mode 100644 index 0000000..6dcf0ea --- /dev/null +++ b/atk16_syntax/syntaxes/atk16.tmLanguage.json @@ -0,0 +1,44 @@ +{ + "$schema": "https://raw.githubusercontent.com/martinring/tmlanguage/master/tmlanguage.json", + "name": "ATK16", + "patterns": [ + { + "name": "comment.documentation.atk16", + "match": ";;;.*" + }, + { + "name": "comment.line.semicolon.atk16", + "match": ";.*" + }, + { + "name": "keyword.control.directive.atk16", + "match": "^@\\w+" + }, + { + "name": "variable.other.register.atk16", + "match": "\\bR[A-H]\\b" + }, + { + "name": "constant.numeric.hex.atk16", + "match": "\\b0x[0-9a-fA-F]+\\b" + }, + { + "name": "constant.numeric.binary.atk16", + "match": "\\b0b[01]+\\b" + }, + { + "name": "constant.numeric.decimal.atk16", + "match": "\\b[0-9]+\\b" + }, + { + "name": "keyword.control.symbol.atk16", + "match": "^\\s+[a-zA-Z_-]+" + }, + { + "name": "constant.language.flag.atk16", + "match": "\\b(carry|overflow|zero|sign)\\b" + } + ], + "repository": {}, + "scopeName": "source.atk16" +} diff --git a/atk16_utils/charmem.py b/atk16_utils/charmem.py new file mode 100644 index 0000000..aaac122 --- /dev/null +++ b/atk16_utils/charmem.py @@ -0,0 +1,63 @@ +#!/usr/bin/env python3 +# Generate .bin file with ATK16 CPU TPU charmem data + +# Addressed by _CCC CCCC CYYY +# Data width 8bit: ___X XXXX +# where _ = unused, C = 8bit character code, Y = character y coordinate, X = pixel value + +import sys + +if len(sys.argv) != 2: + print("usage: charmem.py ") + sys.exit(1) + +outfile_path = sys.argv[1] + +with open("charset.txt", "r") as f: + lines = [s.strip("\n") for s in f.readlines()] + +header_chars = lines[0] + +charset: list[list[str]] = [] + +CHAR_HEIGHT = 8 +CHAR_WIDTH = 8 + +i = 0 +while i < len(lines): + i += 1 # skip comment line + char = lines[i:i+CHAR_HEIGHT] + for row in char: + if len(row) != CHAR_WIDTH: + raise Exception(f"char row number {i} has width != {CHAR_WIDTH}: {len(row)}\n" + row + "\n" + "\n".join(char)) + charset.append(char) + i += CHAR_HEIGHT + 1 + +CHAR_N = len(charset) + +TOTAL_BYTEARRAY_SIZE = CHAR_N * CHAR_HEIGHT + +def string_to_byte(input_string: str): + # Replace spaces with '0' and '#' with '1' + binary_string = input_string.replace(' ', '0').replace('█', '1') + + assert(len(input_string) == CHAR_WIDTH) + + # Check if the string contains only '0' or '1' + if not all(c in '01' for c in binary_string): + raise ValueError("Input string must contain only spaces and '█' characters.") + + # Convert the binary string to an unsigned integer byte + return int(binary_string[::-1], 2) + + +res_b = bytearray(TOTAL_BYTEARRAY_SIZE) +for cn, char in enumerate(charset): + for cy in range(0, CHAR_HEIGHT): + addr = (cn << 3) + cy + byte = string_to_byte(char[cy]) + print(f"{byte:>08b}") + res_b[addr] = byte + +with open(outfile_path, "wb") as f: + f.write(res_b) diff --git a/atk16_utils/convert_ttf.py b/atk16_utils/convert_ttf.py new file mode 100644 index 0000000..c1135cb --- /dev/null +++ b/atk16_utils/convert_ttf.py @@ -0,0 +1,52 @@ +from PIL import Image, ImageFont, ImageDraw + +import sys + +if len(sys.argv) != 3: + print("usage: convert_ttf.py ") + sys.exit(1) + +# Define the font file and size +font_file = sys.argv[1] +out_file = sys.argv[2] +font_size = 8 # 8x8 pixels + +# Create a font object +font = ImageFont.truetype(font_file, font_size) + + +# backspace 0x8, tab 0x9, newline 0xA, space 0x20 + +# Define the characters to render +#characters = ' !"#$%&\'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\\]^_`abcdefghijklmnopqrstuvwxyz{|}~ ¡¢£¤¥¦§¨©ª«¬­®¯°±²³´µ¶·¸¹º»¼½¾¿ÀÁÂÃÄÅÆÇÈÉÊËÌÍÎÏÐÑÒÓÔÕÖ×ØÙÚÛÜÝÞßàáâãäåæçèéêëìíîïðñòóôõö÷øùúûüýþÿ' + +def to_char_code(i: int) -> str: + if i == 10: + return " " + return chr(i) + +characters = [to_char_code(i) for i in range(0, 256)] + + +# Open a file to write the bitmaps to +with open(out_file, 'w') as bitmap_file: + for char_idx, char in enumerate(characters): + # Create a new image with a white background + image = Image.new('1', (8, 8), 1) + + # Create a drawing context + draw = ImageDraw.Draw(image) + + # Draw the character + draw.text((0, 0), char, font=font, fill=0) + + # Convert the image to a list of 0's and 1's + pixels = image.getdata() + bitmap = [1 if pixel == 0 else 0 for pixel in pixels] + + # Write the bitmap to the file + bitmap_file.write(f'Character {char_idx}: {char}\n') + for i in range(0, 64, 8): + row = bitmap[i:i+8] + bitmap_file.write(''.join(str(bit) for bit in row) + '\n') + bitmap_file.write('\n') diff --git a/atk16_utils/dig_install.py b/atk16_utils/dig_install.py new file mode 100644 index 0000000..c32229b --- /dev/null +++ b/atk16_utils/dig_install.py @@ -0,0 +1,60 @@ +#!/usr/bin/env python3 +# Install a generated .bin file into a memory chip in a .dig circuit file + +import sys +from typing import cast +import xml.etree.ElementTree as ET + +if len(sys.argv) != 4: + print("usage: dig_install.py ") + sys.exit(1) + +infile = sys.argv[1] +circuitfile = sys.argv[2] +chip_label = sys.argv[3] + +with open(infile, "rb") as f: + program_bytes = f.read() + +i = 0 +program_words: list[str] = [] +while i < len(program_bytes): + hi_byte = program_bytes[i] + lo_byte = program_bytes[i + 1] + word = f"{hi_byte:>02x}{lo_byte:>02x}" + #print(word) + program_words.append(word) + i += 2 + +program_data = ",".join(program_words) +print("program_data:", program_data) + +tree = ET.parse(circuitfile) +root = tree.getroot() + +# Iterate through each 'visualElement' element +def find_data_element(root: ET.Element) -> ET.Element: + is_correct_visual_element = False + for visual_element in root.findall('.//visualElement'): + element_attributes = visual_element.find('elementAttributes') + if element_attributes is None: continue + + entries = list(element_attributes) + for entry in entries: + strings = entry.findall("string") + is_label_entry = len(strings) == 2 and strings[0].text == "Label" and strings[1].text == chip_label + if is_label_entry and not is_correct_visual_element: + is_correct_visual_element = True + continue + + is_data_entry = len(strings) == 1 and strings[0].text == "Data" + if is_data_entry and is_correct_visual_element: + data_element = entry.findall("data")[0] + return data_element + + raise Exception(f"No data entry matching label {chip_label} found in tree") + +data_element = find_data_element(root) +data_element.text = program_data + +tree.write(circuitfile) \ No newline at end of file diff --git a/atk16_utils/pad_bin.py b/atk16_utils/pad_bin.py new file mode 100644 index 0000000..9f014d1 --- /dev/null +++ b/atk16_utils/pad_bin.py @@ -0,0 +1,59 @@ +import os + +def pad_binary(file_path, target_size) -> int: + """ + Pads a binary file with zeros until it reaches a specified size in KiB. + + :param file_path: Path to the binary file to be padded. + :param target_size: Target size in bytes. + """ + + # Check current file size + current_size = os.path.getsize(file_path) + + # Calculate needed padding + padding_size = target_size - current_size + + # Append zeros if needed + if padding_size > 0: + with open(file_path, 'ab') as file: + file.write(b'\x00' * padding_size) + + return padding_size + +def convert_size_to_bytes(size_str: str) -> int: + """ + Converts a size string with K, M, or G suffix to bytes. + + :param size_str: Size string (e.g., "64K", "1M", "2G"). + :return: Size in bytes. + """ + size_str = size_str.upper() + if size_str.endswith('K'): + return int(size_str[:-1]) * 1024 + elif size_str.endswith('M'): + return int(size_str[:-1]) * 1024 ** 2 + elif size_str.endswith('G'): + return int(size_str[:-1]) * 1024 ** 3 + else: + return int(size_str) + +if __name__ == "__main__": + import argparse + + # Setup argument parser + parser = argparse.ArgumentParser(description='Pad a binary file with zeros until it reaches a specified size.') + parser.add_argument('file', type=str, help='Path to the binary file to be padded.') + parser.add_argument('--to', dest='size', type=str, help='Target size (e.g., 64K, 1M, 2G).', required=True) + + args = parser.parse_args() + + # Convert size argument to bytes + target_size_bytes = convert_size_to_bytes(args.size) + + padded_bytes_n = pad_binary(args.file, target_size_bytes) + + if padded_bytes_n > 0: + print(f"File has been padded with {padded_bytes_n} zeros.") + else: + print("File is already equal to or larger than the target size. No padding added.") diff --git a/atk16_utils/ucode.py b/atk16_utils/ucode.py new file mode 100755 index 0000000..22a2ce2 --- /dev/null +++ b/atk16_utils/ucode.py @@ -0,0 +1,112 @@ +#!/usr/bin/env python3 +# Generate .bin file with ATK16 CPU microcode + +# Addressed by OOOO BUUU +# where O = opcode, B = branch flag, U = microsequencer value + +import sys + +if len(sys.argv) != 2: + print("usage: ucode.py ") + sys.exit(1) + +outfile_path = sys.argv[1] + +PC_CO = 1 << 0 +PC_IE = 1 << 1 +PC_OE = 1 << 2 +MAR_IE = 1 << 3 +MEM_IE = 1 << 4 +MEM_OE = 1 << 5 +RW_IE = 1 << 6 +R1_OE = 1 << 7 +R2_OE = 1 << 8 +IR_IE = 1 << 9 +IM_M = 1 << 10 +LI_OE = 1 << 11 +ALU_OE = 1 << 12 +FR_IE = 1 << 13 +HALT = 1 << 14 +US_RS = 1 << 15 +ISRA_OE = 1 << 16 +IM_DS = 1 << 17 +IM_EN = 1 << 18 +IPC_IE = 1 << 19 +IPC_OE = 1 << 20 +NOP5 = 1 << 21 +NOP6 = 1 << 22 +NOP7 = 1 << 23 + +BRANCH_FLAG_STATES_N = 2 +UCODE_N: int = 2**3 +CONTROL_WORD_SIZE = 3 + +def not_branch(bs: list[int]) -> list[list[int]]: + return BRANCH_FLAG_STATES_N * [bs] + +def branch(false_branch: list[int], true_branch: list[int]) -> list[list[int]]: + return [false_branch, true_branch] + +fetch = [PC_OE|MAR_IE, MEM_OE|IR_IE|PC_CO] + +def nop(): + return not_branch([*fetch, US_RS, 0, 0, 0, 0, 0]) + +ucode = [ + # ALR 0000 TTTL LLRR RSSS + not_branch([*fetch, ALU_OE|FR_IE|RW_IE, US_RS, 0, 0, 0, 0]), + # ALI 0001 TTTL LLII ISSS + not_branch([*fetch, IM_M|ALU_OE|FR_IE|RW_IE, US_RS, 0, 0, 0, 0]), + # LDR 0010 TTTR RRXX XXXX + not_branch([*fetch, R1_OE|MAR_IE, MEM_OE|RW_IE, US_RS, 0, 0, 0]), + # STR 0011 XXXL LLRR RXXX + not_branch([*fetch, R1_OE|MAR_IE, R2_OE|MEM_IE, US_RS, 0, 0, 0]), + # LDI 0100 TTTI IIII IIII + not_branch([*fetch, LI_OE|RW_IE, US_RS, 0, 0, 0, 0]), + # JPR 0101 XXXR RRXX XXXX + not_branch([*fetch, R1_OE|PC_IE, US_RS, 0, 0, 0, 0]), + # JPI 0110 XXXI IIII IIII + not_branch([*fetch, IM_M|LI_OE|PC_IE, US_RS, 0, 0, 0, 0]), + # BRR 0111 XFFR RRXX XXXX + branch([*fetch, US_RS, 0, 0, 0, 0, 0], + [*fetch, R1_OE|PC_IE, US_RS, 0, 0, 0, 0]), + # BRI 1000 XFFI IIII IIII + branch([*fetch, US_RS, 0, 0, 0, 0, 0], + [*fetch, IM_M|LI_OE|PC_IE, US_RS, 0, 0, 0, 0]), + # LPC 1001 TTTX XXXX XXXX + not_branch([*fetch, PC_OE|RW_IE, US_RS, 0, 0, 0, 0]), + # NOP 1010 XXXX XXXX XXXX + nop(), + # NOP 1011 XXXX XXXX XXXX + nop(), + # ISRP0 1100 XXXX XXXX XXXX + not_branch([IM_EN|PC_OE|IPC_IE, ISRA_OE|MAR_IE, MEM_OE|PC_IE, US_RS, 0, 0, 0, 0]), + # ISRP1 1101 XXXX XXXX XXXX + not_branch([IM_EN|PC_OE|IPC_IE, ISRA_OE|MAR_IE, MEM_OE|PC_IE, US_RS, 0, 0, 0, 0]), + # RTI 1110 XXXX XXXX XXXX + not_branch([*fetch, IM_DS|IPC_OE|PC_IE, US_RS, 0, 0, 0, 0]), + # HLT 1111 XXXX XXXX XXXX + not_branch([*fetch, HALT, 0, 0, 0, 0, 0]), +] + +INST_N = len(ucode) +TOTAL_BYTEARRAY_SIZE = INST_N * BRANCH_FLAG_STATES_N * UCODE_N * CONTROL_WORD_SIZE + +res_b = bytearray(TOTAL_BYTEARRAY_SIZE) + +for i in range(INST_N): + for j in range(BRANCH_FLAG_STATES_N): + for k in range(UCODE_N): + for l in range(CONTROL_WORD_SIZE): + idx = l + \ + k * CONTROL_WORD_SIZE + \ + j * CONTROL_WORD_SIZE * UCODE_N + \ + i * CONTROL_WORD_SIZE * UCODE_N * BRANCH_FLAG_STATES_N + cword = ucode[i][j][k] + assert len(ucode[i][j]) == 8 + cbyte = (cword >> (8 * (CONTROL_WORD_SIZE - l - 1))) & 0xff + print(f"inst: {i:>04b}, idx: {idx:>04x}, cbyte: {cbyte:>08b}") + res_b[idx] = cbyte + +with open(outfile_path, "wb") as f: + f.write(res_b) diff --git a/digital-diagrams/atk16.dig b/digital-diagrams/atk16.dig deleted file mode 100644 index 87f7ddb..0000000 --- a/digital-diagrams/atk16.dig +++ /dev/null @@ -1,2748 +0,0 @@ - - - 2 - - - romContent - - - - - - view1 - - - 0.8446671195652201 - 0.0 - 0.0 - 0.8446671195652201 - 481.55870489058793 - 445.5141438507956 - - - - - view2 - - - 0.8446671195652201 - 0.0 - 0.0 - 0.8446671195652201 - 481.55870489058793 - 445.5141438507956 - - - - - view3 - - - 0.8446671195652201 - 0.0 - 0.0 - 0.8446671195652201 - 481.55870489058793 - 445.5141438507956 - - - - - showDataTable - true - - - - - Register - - - valueIsProbe - true - - - Label - MAR - - - Bits - 16 - - - - - - CounterPreset - - - valueIsProbe - true - - - Label - PC - - - Bits - 16 - - - isProgramCounter - true - - - - - - Ground - - - rotation - - - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - atk16_mem.dig - - - Label - MEMORY - - - - - - atk16_jump_unit.dig - - - - - Probe - - - Label - PC - - - - - - atk16_decoder.dig - - - shapeType - CUSTOM - - - - - - Tunnel - - - NetName - FLAG_S - - - - - - Tunnel - - - rotation - - - - NetName - IR_IE - - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - Tunnel - - - rotation - - - - NetName - LI_OE - - - - - - Tunnel - - - rotation - - - - NetName - RW_IE - - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - atk16_regbank.dig - - - - - Driver - - - Bits - 16 - - - flipSelPos - true - - - - - - Tunnel - - - NetName - R2_OE - - - - - - Driver - - - Bits - 16 - - - flipSelPos - true - - - - - - Tunnel - - - NetName - R1_OE - - - - - - atk16_alu_inputs.dig - - - - - Tunnel - - - rotation - - - - NetName - IM_M - - - - - - atk16_alu.dig - - - shapeType - SIMPLE - - - Label - ALU - - - - - - Driver - - - Bits - 16 - - - - - - Register - - - valueIsProbe - true - - - Label - FR - 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- - mirror - true - - - Input Splitting - 24 - - - Output Splitting - 1*24 - - - - - - Tunnel - - - NetName - PC_CO - - - - - - Tunnel - - - NetName - PC_IE - - - - - - Tunnel - - - NetName - PC_OE - - - - - - Tunnel - - - NetName - MAR_IE - - - - - - Tunnel - - - NetName - MEM_IE - - - - - - Tunnel - - - NetName - MEM_OE - - - - - - Tunnel - - - NetName - R1_OE - - - - - - Tunnel - - - NetName - IR_IE - - - - - - Tunnel - - - NetName - ALU_OE - - - - - - Tunnel - - - NetName - US_RS - - - - - - Tunnel - - - NetName - FR_IE - - - - - - Tunnel - - - NetName - RW_IE - - - - - - Stop - - - - - Tunnel - - - NetName - LI_OE - - - - - - Tunnel - - - NetName - IM_M - - - - - - Tunnel - - - NetName - R2_OE - - - - - - atk16_ucode_addr.dig - - - - - Tunnel - - - rotation - - - - NetName - FLAG_S - - - - - - Tunnel - - - rotation - - - - NetName - FR_Q - - - - - - Tunnel - - - rotation - - - - NetName - OPCODE - - - - - - Tunnel - - - NetName - OPCODE - - - - - - Tunnel - - - rotation - - - - NetName - US_Q - - - - - - Tunnel - - - NetName - ISRA_OE - - - - - - Tunnel - - - rotation - - - - NetName - IM_EN - - - - - - Tunnel - - - rotation - - - - NetName - IM_DS - - - - - - Tunnel - - - NetName - IPC_IE - - - - - - Tunnel - - - NetName - IPC_OE - - - - - - Driver - - - Bits - 16 - - - flipSelPos - true - - - - - - Tunnel - - - NetName - ISRA_OE - - - - - - Const - - - Value - 4 - - - Bits - 14 - - - intFormat - hex - - - - - - Tunnel - - - rotation - - - - NetName - IT_N - - - - - - Splitter - - - Input Splitting - 2,14 - - - Output Splitting - 16 - - - - - - Register - - - Label - IPC - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - IPC_IE - - - - - - Driver - - - Bits - 16 - - - flipSelPos - true - - - - - - Tunnel - - - NetName - IPC_OE - - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - Tunnel - - - NetName - IM_EN - - - - - - Tunnel - - - NetName - IM_DS - - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - Tunnel - - - rotation - - - - NetName - MEM_IE - - - - - - Tunnel - - - rotation - - - - NetName - MEM_OE - - - - - - Tunnel - - - NetName - DBUS - - - - - - Probe - - - Label - MMIO_S - - - - - - Tunnel - - - NetName - MMIO_IE - - - - - - Tunnel - - - NetName - MMIO_OE - - - - - - Tunnel - - - NetName - MMIO_S - - - - - - atk16_peripherals.dig - - - - - Tunnel - - - rotation - - - - NetName - MMIO_OE - - - - - - Tunnel - - - rotation - - - - NetName - IT_N - - - - - - Tunnel - - - rotation - - - - NetName - IM_DS - - - - - - Counter - - - Label - CLK divider /16 - - - Bits - 4 - - - - - - Tunnel - - - NetName - CLK - - - - - - VDD - - - rotation - - - - - - - Ground - - - - - Clock - - - runRealTime - true - - - Frequency - 25175000 - - - - - - Tunnel - - - NetName - IT_N - - - - - - EEPROM - - - AddrBits - 8 - - - Label - UCODE - - - Bits - 24 - - - Data - c,221,3040,8000,4*0,c,221,3040,8000,4*0,c,221,3440,8000,4*0,c -,221,3440,8000,4*0,c,221,88,60,8000,0,0,0,c,221,88,60,8000,0,0,0 -,c,221,88,110,8000,0,0,0,c,221,88,110,8000,0,0,0,c,221,840,8000 -,4*0,c,221,840,8000,4*0,c,221,82,8000,4*0,c,221,82,8000,4*0,c -,221,c02,8000,4*0,c,221,c02,8000,4*0,c,221,8000,5*0,c,221,82,8000 -,4*0,c,221,8000,5*0,c,221,c02,8000,4*0,c,221,44,8000,4*0,c,221 -,44,8000,4*0,c,221,8000,5*0,c,221,8000,5*0,c,221,8000,5*0,c,221 -,8000,5*0,c0004,10008,22,8000,4*0,c0004,10008,22,8000,4*0,c0004 -,10008,22,8000,4*0,c0004,10008,22,8000,4*0,c,221,120002,8000,4*0 -,c,221,120002,8000,4*0,c,221,4000,5*0,c,221,4000 - - - - - - VDD - - - rotation - - - - - - - Ground - - - rotation - - - - - - - VDD - - - rotation - - - - - - - Tunnel - - - NetName - DBUS - - - - - - Tunnel - - - rotation - - - - NetName - MMIO_IE - - - - - - Tunnel - - - rotation - - - - NetName - MMIO_S - - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - Tunnel - - - rotation - - - - NetName - MMIO_IE - - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - atk16_graphics_mode.dig - - - - - Tunnel - - - rotation - - - - NetName - MMIO_S - - - - - - Tunnel - - - NetName - PCLK - - - - - - Probe - - - Label - GRAPHICS MODE - - - - - - Tunnel - - - NetName - GRMODE - - - - - - atk16_ppu.dig - - - - - Splitter - - - Input Splitting - 2,2,2 - - - Output Splitting - 6 - - - - - - Tunnel - - - rotation - - - - NetName - DBUS - - - - - - Tunnel - - - rotation - - - - NetName - PCLK - - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - Tunnel - - - rotation - - - - NetName - PCLK - - - - - - Tunnel - - - rotation - - - - NetName - MMIO_IE - - - - - - Tunnel - - - rotation - - - - NetName - MMIO_OE - - - - - - Tunnel - - - rotation - - - - NetName - MMIO_S - - - - - - atk16_tpu.dig - - - - - Tunnel - - - rotation - - - - NetName - MMIO_IE - - - - - - Tunnel - - - rotation - - - - NetName - MMIO_OE - - - - - - Tunnel - - - rotation - - - - NetName - MMIO_S - - - - - - VGA - - - - - Splitter - - - Input Splitting - 6 - - - Output Splitting - 2,2,2 - - - - - - Tunnel - - - rotation - - - - NetName - PCLK - - - - - - Splitter - - - Input Splitting - 2,2,2 - - - Output Splitting - 6 - - - - - - Multiplexer - - - Selector Bits - 2 - - - Bits - 6 - - - - - - Tunnel - - - rotation - - - - NetName - GRMODE - - - - - - Const - - - Value - 0 - - - Bits - 6 - - - - - - Probe - - - intFormat - dec - - - - - - Probe - - - intFormat - dec - - - - - - atk16_vga_sync.dig - - - - - Tunnel - - - rotation - - - - NetName - DBUS - - - - - - Tunnel - - - rotation - - - - NetName - PCLK - - - - - - Tunnel - - - rotation - - - - NetName - US_RS - - - - - - Reset - - - invertOutput - false - - - - - - Or - - - - - Break - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_alu.dig b/digital-diagrams/atk16_alu.dig deleted file mode 100644 index 0f40f94..0000000 --- a/digital-diagrams/atk16_alu.dig +++ /dev/null @@ -1,1695 +0,0 @@ - - - 2 - - - romContent - - - - - - Width - 5 - - - - - Add - - - Label - PLUS - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - A - - - - - - Tunnel - - - rotation - - - - NetName - B - - - - - - Ground - - - - - Tunnel - - - NetName - Y - - - - - - Tunnel - - - NetName - FC - - - - - - Driver - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - S0 - - - - - - Driver - - - - - Tunnel - - - rotation - - - - NetName - S0 - - - - - - atk16_alu_fo.dig - - - Label - Overflow flag - - - - - - Tunnel - - - rotation - - - - NetName - A - - - - - - Tunnel - - - rotation - - - - NetName - B - - - - - - Ground - - - - - Tunnel - - - NetName - Y - - - - - - Tunnel - - - NetName - FC - - - - - - Driver - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - S1 - - - - - - Driver - - - - - Tunnel - - - rotation - - - - NetName - S1 - - - - - - Sub - - - Label - MINUS - - - Bits - 16 - - - - - - And - - - Bits - 16 - - - - - - Text - - - Description - AND - - - - - - Tunnel - - - rotation - - - - NetName - A - - - - - - Tunnel - - - rotation - - - - NetName - B - - - - - - Driver - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - S2 - - - - - - Tunnel - - - NetName - Y - - - - - - Or - - - Bits - 16 - - - - - - Text - - - Description - OR - - - - - - Tunnel - - - rotation - - - - NetName - A - - - - - - Tunnel - - - rotation - - - - NetName - B - - - - - - Driver - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - S3 - - - - - - Tunnel - - - NetName - Y - - - - - - XOr - - - Bits - 16 - - - - - - Text - - - Description - XOR - - - - - - Tunnel - - - rotation - - - - NetName - A - - - - - - Tunnel - - - rotation - - - - NetName - B - - - - - - Driver - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - S4 - - - - - - Tunnel - - - NetName - Y - - - - - - BarrelShifter - - - Label - LOG SHIFT RIGHT - - - Bits - 16 - - - direction - right - - - - - - Tunnel - - - rotation - - - - NetName - A - - - - - - Tunnel - - - rotation - - - - NetName - B_L5 - - - - - - Driver - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - S5 - - - - - - Tunnel - - - NetName - Y - - - - - - BarrelShifter - - - Label - ARI SHIFT RIGHT - - - Bits - 16 - - - barrelShifterMode - arithmetic - - - direction - right - - - - - - Tunnel - - - rotation - - - - NetName - A - - - - - - Driver - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - S6 - - - - - - Tunnel - - - NetName - Y - - - - - - BarrelShifter - - - Label - LOG SHIFT LEFT - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - A - - - - - - Driver - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - S7 - - - - - - Tunnel - - - NetName - Y - - - - - - Tunnel - - - rotation - - - - NetName - B_L5 - - - - - - Tunnel - - - rotation - - - - NetName - B_L5 - - - - - - Tunnel - - - rotation - - - - NetName - B15 - - - - - - Tunnel - - - rotation - - - - NetName - Y15 - - - - - - Tunnel - - - rotation - - - - NetName - A15 - - - - - - Tunnel - - - NetName - FO - - - - - - Text - - - Description - Sign flag - - - - - - Tunnel - - - rotation - - - - NetName - Y15 - - - - - - Tunnel - - - NetName - FS - - - - - - atk16_alu_fz.dig - - - Label - Zero flag - - - - - - Tunnel - - - rotation - - - - NetName - Y - - - - - - Tunnel - - - NetName - FZ - - - - - - Tunnel - - - rotation - - - - NetName - S1 - - - - - - Testcase - - - Label - PLUS test - - - Testdata - - A B S FLAGS Y -0x1 0x2 0 0b0000 0x3 -0xff 0x1 0 0b0000 0x100 -0x1 0xffff 0 0b0101 0x0 -0x4000 0x4000 0 0b1010 0x8000 - - - - - - - Testcase - - - Label - MINUS test - - - Testdata - - A B S FLAGS Y -0x10 0x1 1 0b0000 0xF -0x1 0x0 1 0b0000 0x1 -0x0 0x1 1 0b1001 0xFFFF -0x8000 0x1 1 0b0010 0x7FFF - - - - - - - In - - - Description - LHS of binary ALU operation - - - Label - A - - - Bits - 16 - - - - - - In - - - Description - RHS of binary ALU operation - - - Label - B - - - Bits - 16 - - - - - - In - - - Description - ALU operation code - - - Label - S - - - Bits - 3 - - - - - - Text - - - Description - S Y -0 A + B -1 A - B -2 A and B -3 A or B -4 A xor B -5 A >> B # logical -6 A >>> B # arithmetic -7 A << B - - - - - - Decoder - - - Selector Bits - 3 - - - flipSelPos - true - - - - - - Tunnel - - - NetName - S0 - - - - - - Tunnel - - - NetName - S1 - - - - - - Tunnel - - - NetName - S2 - - - - - - Tunnel - - - NetName - S3 - - - - - - Tunnel - - - NetName - S4 - - - - - - Tunnel - - - NetName - S5 - - - - - - Tunnel - - - NetName - S6 - - - - - - Tunnel - - - NetName - S7 - - - - - - Tunnel - - - rotation - - - - NetName - A - - - - - - Splitter - - - Input Splitting - 16 - - - Output Splitting - 15,1 - - - - - - Tunnel - - - rotation - - - - NetName - B - - - - - - Splitter - - - Input Splitting - 16 - - - Output Splitting - 15,1 - - - - - - Splitter - - - Input Splitting - 16 - - - Output Splitting - 5 - - - - - - Tunnel - - - NetName - B_L5 - - - - - - Tunnel - - - NetName - A15 - - - - - - Tunnel - - - NetName - B15 - - - - - - Splitter - - - Input Splitting - 16 - - - Output Splitting - 15,1 - - - - - - Tunnel - - - rotation - - - - NetName - Y - - - - - - Tunnel - - - NetName - Y15 - - - - - - Out - - - Description - Output - - - Label - Y - - - Bits - 16 - - - - - - Splitter - - - Input Splitting - 1*4 - - - Output Splitting - 4 - - - - - - Out - - - Label - FLAGS - - - Bits - 4 - - - - - - Tunnel - - - rotation - - - - NetName - FO - - - - - - Tunnel - - - rotation - - - - NetName - FZ - - - - - - Tunnel - - - rotation - - - - NetName - FS - - - - - - Tunnel - - - rotation - - - - NetName - FC - - - - - - PullDown - - - rotation - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_alu_carryfix.dig b/digital-diagrams/atk16_alu_carryfix.dig deleted file mode 100644 index 1c22602..0000000 --- a/digital-diagrams/atk16_alu_carryfix.dig +++ /dev/null @@ -1,270 +0,0 @@ - - - 2 - - - - Out - - - Label - Y - - - Inputs - 1 - - - - - - Or - - - wideShape - true - - - - - - And - - - wideShape - true - - - Inputs - 3 - - - - - - And - - - wideShape - true - - - Inputs - 3 - - - - - - In - - - rotation - - - - Label - S2 - - - - - - Not - - - rotation - - - - - - - In - - - rotation - - - - Label - S1 - - - - - - Not - - - rotation - - - - - - - In - - - rotation - - - - Label - S0 - - - - - - Not - - - rotation - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_alu_fo.dig b/digital-diagrams/atk16_alu_fo.dig deleted file mode 100644 index ecf0021..0000000 --- a/digital-diagrams/atk16_alu_fo.dig +++ /dev/null @@ -1,494 +0,0 @@ - - - 2 - - - Label - alu_fo - - - romContent - - - - - - Width - 4 - - - - - Testcase - - - Testdata - - A15 B15 Y15 ~A/S FO -0 0 0 0 0 -0 0 1 0 1 -0 1 0 0 0 -0 1 1 0 0 -1 0 0 0 0 -1 0 1 0 0 -1 1 0 0 1 -1 1 1 0 0 -0 0 0 1 0 -0 0 1 1 0 -0 1 0 1 0 -0 1 1 1 1 -1 0 0 1 1 -1 0 1 1 0 -1 1 0 1 0 -1 1 1 1 0 - - - - - - - - Out - - - Label - FO - - - Inputs - 1 - - - - - - Or - - - wideShape - true - - - Inputs - 4 - - - - - - And - - - wideShape - true - - - Inputs - 4 - - - - - - And - - - wideShape - true - - - Inputs - 4 - - - - - - And - - - wideShape - true - - - Inputs - 4 - - - - - - And - - - wideShape - true - - - Inputs - 4 - - - - - - In - - - rotation - - - - Label - ~A/S - - - - - - Not - - - rotation - - - - - - - In - - - rotation - - - - Label - A15 - - - - - - Not - - - rotation - - - - - - - In - - - rotation - - - - Label - B15 - - - - - - Not - - - rotation - - - - - - - In - - - rotation - - - - Label - Y15 - - - - - - Not - - - rotation - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_alu_fz.dig b/digital-diagrams/atk16_alu_fz.dig deleted file mode 100644 index 2da652a..0000000 --- a/digital-diagrams/atk16_alu_fz.dig +++ /dev/null @@ -1,192 +0,0 @@ - - - 2 - - - Label - alu_fz - - - romContent - - - - - - - - In - - - Label - Y - - - Bits - 16 - - - - - - Splitter - - - Input Splitting - 16 - - - Output Splitting - 4*4 - - - - - - Splitter - - - Input Splitting - 4 - - - Output Splitting - 1*4 - - - - - - Out - - - Label - FZ - - - - - - Testcase - - - Testdata - - Y FZ -0x0 1 -0x1 0 -0xff 0 - - - - - - - NOr - - - Inputs - 4 - - - - - - Or - - - Bits - 4 - - - Inputs - 4 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_alu_inputs.dig b/digital-diagrams/atk16_alu_inputs.dig deleted file mode 100644 index 310bafb..0000000 --- a/digital-diagrams/atk16_alu_inputs.dig +++ /dev/null @@ -1,215 +0,0 @@ - - - 2 - - - Description - Maps the R1 input to the A output. Uses OPCODE parity to mux either the R2 input (even parity) or the RW_S input, here acting as a small immediate value, to the B output. - - - romContent - - - - - - Width - 5 - - - - - In - - - Description - Register 1 value from regbank - - - Label - R1 - - - Bits - 16 - - - - - - In - - - Description - Register 2 value from regbank - - - Label - R2 - - - Bits - 16 - - - - - - Multiplexer - - - Bits - 16 - - - - - - In - - - Description - Register 2 selector - - - Label - R2_S - - - Bits - 3 - - - - - - In - - - Description - Immediate mode on? - - - Label - IM_M - - - - - - Out - - - Description - Output A - - - Label - A - - - Bits - 16 - - - - - - Out - - - Description - Output B - - - Label - B - - - Bits - 16 - - - - - - Splitter - - - Input Splitting - 3,13 - - - Output Splitting - 16 - - - - - - Ground - - - Bits - 13 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_decoder.dig b/digital-diagrams/atk16_decoder.dig deleted file mode 100644 index b8eb088..0000000 --- a/digital-diagrams/atk16_decoder.dig +++ /dev/null @@ -1,364 +0,0 @@ - - - 2 - - - romContent - - - - - - Width - 5 - - - - - Register - - - valueIsProbe - true - - - Label - IR - - - Bits - 16 - - - - - - In - - - Label - DBUS - - - Bits - 16 - - - isHighZ - true - - - - - - In - - - Description - Instruction register input enable - - - Label - IR_IE - - - - - - In - - - Label - CLK - - - - - - Splitter - - - splitterSpreading - 2 - - - Input Splitting - 16 - - - Output Splitting - 3,3,3,3,4 - - - - - - Tunnel - - - NetName - DBUS - - - - - - Tunnel - - - rotation - - - - NetName - DBUS - - - - - - Out - - - Description - Opcode - - - Label - OP - - - Bits - 4 - - - - - - Out - - - Description - Write register selection - - - Label - RW_S - - - Bits - 3 - - - - - - Out - - - Description - ALU selection code - - - Label - ALU_S - - - Bits - 3 - - - - - - Out - - - Description - Read register 1 selection - - - Label - R1_S - - - Bits - 3 - - - - - - Out - - - Description - Read register 2 selection - - - Label - R2_S - - - Bits - 3 - - - - - - Splitter - - - Input Splitting - 16 - - - Output Splitting - 9, - - - - - - Driver - - - Bits - 16 - - - flipSelPos - true - - - - - - Tunnel - - - NetName - DBUS - - - - - - In - - - Description - Low 9 bits immediate value output enable - - - Label - LI_OE - - - - - - Testcase - - - Testdata - - CLK DBUS IR_IE LI_OE OP RW_S R1_S R2_S ALU_S -C 0b0000001010011000 1 0 0 1 2 3 0 - - - - - - - BitExtender - - - inputBits - 9 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_graphics_mode.dig b/digital-diagrams/atk16_graphics_mode.dig deleted file mode 100644 index 2d05dd6..0000000 --- a/digital-diagrams/atk16_graphics_mode.dig +++ /dev/null @@ -1,311 +0,0 @@ - - - 2 - - - romContent - - - - - - Width - 5 - - - - - In - - - Label - DBUS - - - Bits - 16 - - - - - - Out - - - Description - 00 disabled -01 text mode -10 sprite mode -11 undefined - - - Label - MODE - - - Bits - 2 - - - - - - Register - - - Label - GRAPHICS MODE - - - Bits - 2 - - - - - - And - - - Inputs - 13 - - - - - - Splitter - - - Input Splitting - 13 - - - Output Splitting - 1*13 - - - - - - And - - - - - Splitter - - - Input Splitting - 16 - - - Output Splitting - 2,14 - - - - - - In - - - Label - MMIO_S - - - Bits - 13 - - - - - - In - - - Label - MMIO_IE - - - - - - Const - - - Value - 2 - - - Bits - 13 - - - - - - XNOr - - - Bits - 13 - - - - - - In - - - Label - CLK - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_irc.dig b/digital-diagrams/atk16_irc.dig deleted file mode 100644 index 0037fa0..0000000 --- a/digital-diagrams/atk16_irc.dig +++ /dev/null @@ -1,341 +0,0 @@ - - - 2 - - - romContent - - - - - - Width - 5 - - - - - In - - - Description - IRQ lines - - - Label - IRQ - - - Bits - 4 - - - - - - In - - - Description - PC value - - - Label - PC - - - Bits - 16 - - - - - - Splitter - - - Input Splitting - 4 - - - Output Splitting - 1*4 - - - - - - Text - - - Description - Some IRQ active? - - - - - - In - - - Label - MAR_IE - - - - - - And - - - - - Multiplexer - - - Bits - 16 - - - - - - Out - - - Label - DBUS - - - Bits - 16 - - - - - - Driver - - - Bits - 16 - - - flipSelPos - true - - - - - - In - - - Label - PC_OE - - - - - - PriorityEncoder - - - Selector Bits - 2 - - - - - - Const - - - Value - 17 - - - Bits - 16 - - - - - - Multiplexer - - - Selector Bits - 2 - - - Bits - 16 - - - - - - Const - - - Value - 16 - - - Bits - 16 - - - - - - Const - - - Value - 18 - - - Bits - 16 - - - - - - Const - - - Value - 19 - - - Bits - 16 - - - - - - Testcase - - - Testdata - - IRQ PC MAR_IE PC_OE DBUS -0b0000 0x5 0 0 Z -0b0000 0x5 0 1 0x5 -0b0001 0x5 0 1 0x5 -0b0001 0x5 1 1 0x10 -0b0101 0x5 1 1 0x12 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_jump_unit.dig b/digital-diagrams/atk16_jump_unit.dig deleted file mode 100644 index 4ccd266..0000000 --- a/digital-diagrams/atk16_jump_unit.dig +++ /dev/null @@ -1,193 +0,0 @@ - - - 2 - - - Description - Uses OPCODE parity to choose between relative addressing mode (even parity) or absolute addressing mode (odd parity). - - - romContent - - - - - - Width - 5 - - - - - In - - - Description - Jump address - - - Label - ADDR - - - Bits - 16 - - - - - - In - - - Description - PC value - - - Label - PC - - - Bits - 16 - - - - - - In - - - Description - Immediate mode on? - - - Label - IM_M - - - - - - Out - - - Description - Result PC value - - - Label - PC_RES - - - Bits - 16 - - - - - - Add - - - Bits - 16 - - - - - - Multiplexer - - - Bits - 16 - - - - - - Ground - - - - - Testcase - - - Testdata - - PC ADDR IM_M PC_RES -10 20 0 20 -10 20 1 30 - - - - - - - Not - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_mem.dig b/digital-diagrams/atk16_mem.dig deleted file mode 100644 index 6ff9810..0000000 --- a/digital-diagrams/atk16_mem.dig +++ /dev/null @@ -1,949 +0,0 @@ - - 2 - - - romContent - - - - - - Width - 7 - - - - - EEPROM - - - AddrBits - 15 - - - isProgramMemory - true - - - Label - MEM_ROM - - - Bits - 16 - - - Data - 4014,2e00,1dc0,6026,8000,8000,8000,8000,8000,8000,8000,8000,8000,8000,8000,8000,001b,001a,001a,001a,8000,e000,e001,e002,e800,f800,f000,31c0,1fc8,31c8,1fc8,4016,2000,2000,4215,2240,3040,1fc9,23c0,1fc9,21c0,e000,4017,2000,4200,3008,600d,0008,0000,0001,0002,0017,0019,9000,0100,0031,0061,0062,0063,0032,402f,2000,0fc0,4433,2480,31d0,1fc8,1fc9,25c0,2480,31d0,1fc8,1fc9,21c0,4200,0270,3040,4434,2480,31d0,1fc8,1fc9,25c0,2480,31d0,1fc8,1fc9,21c0,4201,0270,3040,4000,0180,2000,31c0,1fc8,4031,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4000,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4037,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4001,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4038,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4002,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4039,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4003,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,403a,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4004,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,403b,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4005,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4435,2480,31d0,1fc8,1fc9,21c0,4202,0270,3040,4400,31d0,1fc8,1fc9,21c0,4203,0270,3040,4402,0590,2480,31d0,1fc8,1fc9,25c0,2480,31d0,1fc8,1fc9,21c0,4204,0270,3040,4400,31d0,1fc8,1fc9,21c0,4205,0270,3040,4201,31c8,1fc8,1fc9,21c0,1000,8451,4435,2480,31d0,1fc8,4403,0590,2480,31d0,1fc8,1fc9,27c0,1fc9,25c0,0498,31d0,1fc8,1fc9,21c0,4206,0270,3040,4406,0590,2480,31d0,1fc8,1fc9,25c0,2480,31d0,1fc8,1fc9,21c0,4207,0270,3040,4007,0180,2000,31c0,1fc8,4000,31c0,1fc8,1fc9,21c0,1000,8402,6020,6000,4407,0590,2480,31d0,1fc8,1fc9,21c0,4205,0270,3040,4403,0590,2480,31d0,1fc8,4401,31d0,1fc8,1fc9,27c0,1fc9,25c0,0498,31d0,1fc8,1fc9,21c0,4203,0270,3040,61a8,4001,0180,2000,31c0,1fc8,4000,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4004,0180,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4001,0180,2000,31c0,1fc8,4001,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4005,0180,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,1f80,f000 - - - - - - Ground - - - rotation - - - - - - - VDD - - - rotation - - - - - - - VDD - - - rotation - - - - - - - In - - - Description - Address - - - Label - ADDR - - - Bits - 16 - - - - - - Splitter - - - Input Splitting - 16 - - - Output Splitting - 13,1,1,1 - - - - - - atk16_mem_mux.dig - - - - - Splitter - - - Input Splitting - 13,1,1 - - - Output Splitting - 15 - - - - - - Splitter - - - Input Splitting - 1,1 - - - Output Splitting - 2 - - - - - - Demultiplexer - - - Selector Bits - 2 - - - Bits - 15 - - - - - - Probe - - - Label - ROM_OUT - - - - - - Driver - - - Bits - 16 - - - flipSelPos - true - - - - - - Demultiplexer - - - Selector Bits - 2 - - - flipSelPos - true - - - - - - Tunnel - - - NetName - RAM_IE - - - - - - In - - - Description - Data bus - - - Label - DBUS - - - Bits - 16 - - - isHighZ - true - - - - - - Tunnel - - - NetName - CLK - - - - - - RAMDualPort - - - AddrBits - 15 - - - Label - MEM_RAM - - - Bits - 16 - - - - - - VDD - - - rotation - - - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - Tunnel - - - rotation - - - - NetName - RAM_IE - - - - - - Tunnel - - - rotation - - - - NetName - DBUS - - - - - - Probe - - - Label - RAM_OUT - - - - - - Driver - - - Bits - 16 - - - - - - In - - - Description - Clock - - - Label - CLK - - - - - - Out - - - Description - Memory-mapped I/O word input enable - - - Label - MMIO_IE - - - - - - Out - - - Description - Memory-mapped I/O word output enable - - - Label - MMIO_OE - - - - - - Tunnel - - - NetName - MMIO_S - - - - - - Testcase - - - Testdata - - CLK ADDR MEM_IE MEM_OE DBUS DBUS_out - -# read ROM -program(0xFF) -C 0x0 0 1 Z 0xFF - -# read RAM -memory MEM_RAM(0x0)=0x55; -C 0 0 0 Z X -C 0x8000 0 1 Z 0x55 - -# write to RAM -C 0x8000 1 0 0xAA 0xAA -C 0x8000 0 1 Z 0xAA - - - - - - - - In - - - Description - Memory input enable - - - Label - MEM_IE - - - - - - In - - - Description - Memory output enable - - - Label - MEM_OE - - - - - - And - - - rotation - - - - - - - Tunnel - - - NetName - RAM_OE - - - - - - Tunnel - - - NetName - MEM_OE - - - - - - Tunnel - - - NetName - MEM_OE - - - - - - Tunnel - - - NetName - DBUS - - - - - - And - - - rotation - - - - - - - Tunnel - - - NetName - ROM_OE - - - - - - Tunnel - - - NetName - MEM_OE - - - - - - Tunnel - - - NetName - DBUS - - - - - - Tunnel - - - NetName - DBUS - - - - - - Decoder - - - Selector Bits - 2 - - - flipSelPos - true - - - - - - Tunnel - - - NetName - ROM_OE - - - - - - Tunnel - - - NetName - RAM_OE - - - - - - Tunnel - - - NetName - MMIO_OE - - - - - - Tunnel - - - NetName - MMIO_IE - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - MEM_OE - - - - - - Tunnel - - - rotation - - - - NetName - MMIO_OE - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - MEM_IE - - - - - - Tunnel - - - rotation - - - - NetName - MMIO_IE - - - - - - Out - - - Description - Memory-mapped I/O word selector - - - Label - MMIO_S - - - Bits - 13 - - - - - - Tunnel - - - rotation - - - - NetName - MMIO_S - - - - - - Tunnel - - - NetName - MEM_IE - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_mem_mux.dig b/digital-diagrams/atk16_mem_mux.dig deleted file mode 100644 index d4be584..0000000 --- a/digital-diagrams/atk16_mem_mux.dig +++ /dev/null @@ -1,276 +0,0 @@ - - - 2 - - - - Out - - - Label - X - - - Inputs - 1 - - - - - - And - - - wideShape - true - - - Inputs - 3 - - - - - - Out - - - Label - Y - - - Inputs - 1 - - - - - - Or - - - wideShape - true - - - - - - And - - - wideShape - true - - - - - - And - - - wideShape - true - - - - - - In - - - rotation - - - - Label - C - - - - - - In - - - rotation - - - - Label - B - - - - - - Not - - - rotation - - - - - - - In - - - rotation - - - - Label - A - - - - - - Not - - - rotation - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_peripherals.dig b/digital-diagrams/atk16_peripherals.dig deleted file mode 100644 index c8eb7b5..0000000 --- a/digital-diagrams/atk16_peripherals.dig +++ /dev/null @@ -1,852 +0,0 @@ - - - 2 - - - romContent - - - - - - Width - 6 - - - - - Splitter - - - Input Splitting - 1*4 - - - Output Splitting - 4 - - - - - - Out - - - Label - IRQ - - - Bits - 4 - - - - - - RS_FF_AS - - - - - Tunnel - - - rotation - - - - NetName - IRQ0 - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - IM_DS - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - IM_DS - - - - - - RS_FF_AS - - - - - Tunnel - - - rotation - - - - NetName - IRQ1 - - - - - - RS_FF_AS - - - - - Tunnel - - - rotation - - - - NetName - IRQ2 - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - IM_DS - - - - - - RS_FF_AS - - - - - Tunnel - - - rotation - - - - NetName - IRQ3 - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - IM_DS - - - - - - Decoder - - - Selector Bits - 2 - - - - - - Comparator - - - Bits - 13 - - - - - - Const - - - Value - 0 - - - Bits - 13 - - - - - - And - - - - - Terminal - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - Tunnel - - - rotation - - - - NetName - DBUS - - - - - - Tunnel - - - rotation - - - - NetName - IE - - - - - - Tunnel - - - rotation - - - - NetName - S - - - - - - Keyboard - - - - - Tunnel - - - NetName - IRQ0 - - - - - - Tunnel - - - NetName - DBUS - - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - Comparator - - - Bits - 13 - - - - - - Const - - - Bits - 13 - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - OE - - - - - - Tunnel - - - rotation - - - - NetName - S - - - - - - Ground - - - - - Tunnel - - - NetName - IRQ1 - - - - - - Ground - - - - - Tunnel - - - NetName - IRQ2 - - - - - - Ground - - - - - Tunnel - - - NetName - IRQ3 - - - - - - In - - - Label - IM_DS - - - - - - Tunnel - - - NetName - IM_DS - - - - - - In - - - Label - IT_N - - - Bits - 2 - - - - - - In - - - Label - OE - - - - - - Tunnel - - - NetName - OE - - - - - - In - - - Label - IE - - - - - - Tunnel - - - NetName - IE - - - - - - In - - - Label - S - - - Bits - 13 - - - - - - Tunnel - - - NetName - S - - - - - - In - - - Label - CLK - - - - - - Tunnel - - - NetName - CLK - - - - - - Out - - - Label - DBUS - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - DBUS - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_ppu.dig b/digital-diagrams/atk16_ppu.dig deleted file mode 100644 index e6e7608..0000000 --- a/digital-diagrams/atk16_ppu.dig +++ /dev/null @@ -1,827 +0,0 @@ - - - 2 - - - romContent - - - - - - Width - 7 - - - - - RAMDualPort - - - AddrBits - 7 - - - Label - SPRITE MEM - - - Bits - 16 - - - - - - Text - - - Description - 8 bits tile pattern index -10 bits Y position -10 bits X position -1 bit H flip -1 bit V flip -1 bit behind background? (priority) -1 bit palette select -= total 4 bytes per sprite -x 64 sprites -= 128 words - - - - - - Text - - - Description - 2**7 selector addresses for -sprite mem, starting from 0x0800 - - - - - - In - - - Label - MMIO_IE - - - - - - In - - - Label - MMIO_OE - - - - - - Tunnel - - - rotation - - - - NetName - CLK - - - - - - In - - - Description - MMI/O selector - - - Label - MMIO_S - - - Bits - 13 - - - - - - Tunnel - - - rotation - - - - NetName - DBUS - - - - - - Tunnel - - - rotation - - - - NetName - SMEMBUS - - - - - - Splitter - - - Input Splitting - 13 - - - Output Splitting - 11,1,1 - - - - - - And - - - inverterConfig - - In_2 - - - - - - - Tunnel - - - rotation - - - - NetName - SM_QUERY - - - - - - Ground - - - Bits - 11 - - - - - - RAMDualPort - - - AddrBits - 9 - - - Label - SCAN BUFFER - - - Bits - 4 - - - - - - Tunnel - - - rotation - - - - NetName - X - - - - - - Splitter - - - mirror - true - - - Input Splitting - 4 - - - Output Splitting - 1*4 - - - - - - atk16_ppu_palette.dig - - - - - Splitter - - - Input Splitting - 1,1 - - - Output Splitting - 2 - - - - - - Splitter - - - Input Splitting - 1,1 - - - Output Splitting - 2 - - - - - - Splitter - - - Input Splitting - 1,1 - - - Output Splitting - 2 - - - - - - Tunnel - - - NetName - PR - - - - - - Tunnel - - - NetName - PG - - - - - - Tunnel - - - NetName - PB - - - - - - Ground - - - rotation - - - - Bits - 4 - - - - - - Ground - - - rotation - - - - - - - Counter - - - - - Tunnel - - - rotation - - - - NetName - PCLK - - - - - - VDD - - - - - Ground - - - - - Text - - - Description - TODO - - - - - - Tunnel - - - rotation - - - - NetName - SMEMBUS - - - - - - Ground - - - rotation - - - - Bits - 7 - - - - - - Text - - - Description - TODO: 8x8x4 tile pattern memory - - - - - - VDD - - - rotation - - - - - - - Probe - - - Label - SCAN BUF - - - - - - Out - - - Label - PR - - - Bits - 2 - - - - - - Out - - - Label - PG - - - Bits - 2 - - - - - - Out - - - Label - PB - - - Bits - 2 - - - - - - Tunnel - - - rotation - - - - NetName - PB - - - - - - Tunnel - - - rotation - - - - NetName - PR - - - - - - Tunnel - - - rotation - - - - NetName - PG - - - - - - In - - - Description - Pixel clock - - - Label - PCLK - - - - - - Tunnel - - - NetName - PCLK - - - - - - In - - - Description - CPU clock - - - Label - CLK - - - - - - Tunnel - - - NetName - CLK - - - - - - Tunnel - - - NetName - DBUS - - - - - - In - - - Description - Data bus - - - Label - DBUS - - - Bits - 16 - - - - - - In - - - Description - X pixel - - - Label - X - - - Bits - 9 - - - - - - Tunnel - - - NetName - X - - - - - - In - - - Description - Y pixel - - - Label - Y - - - Bits - 8 - - - - - - Tunnel - - - NetName - Y - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_ppu_palette.dig b/digital-diagrams/atk16_ppu_palette.dig deleted file mode 100644 index 40101b7..0000000 --- a/digital-diagrams/atk16_ppu_palette.dig +++ /dev/null @@ -1,225 +0,0 @@ - - - 2 - - - romContent - - - - - - Width - 6 - - - - - Out - - - Label - YR1 - - - Inputs - 1 - - - - - - Out - - - Label - YR0 - - - Inputs - 1 - - - - - - Out - - - Label - YG1 - - - Inputs - 1 - - - - - - Out - - - Label - YG0 - - - Inputs - 1 - - - - - - Out - - - Label - YB1 - - - Inputs - 1 - - - - - - Out - - - Label - YB0 - - - Inputs - 1 - - - - - - In - - - rotation - - - - Label - R0 - - - - - - In - - - rotation - - - - Label - G1 - - - - - - In - - - rotation - - - - Label - G0 - - - - - - In - - - rotation - - - - Label - B0 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - \ No newline at end of file diff --git a/digital-diagrams/atk16_ppu_sprite_eval.dig b/digital-diagrams/atk16_ppu_sprite_eval.dig deleted file mode 100644 index c765847..0000000 --- a/digital-diagrams/atk16_ppu_sprite_eval.dig +++ /dev/null @@ -1,4325 +0,0 @@ - - - 2 - - - - Tunnel - - - NetName - PCLK - - - - - - Clock - - - Frequency - 20 - - - runRealTime - true - - - - - - In - - - Label - PCLK - - - - - - Rectangle - - - Label - Stage 1 Secondary Clear - - - RectHeight - 15 - - - RectWidth - 35 - - - - - - Tunnel - - - NetName - NPCLK - - - - - - Not - - - - - Break - - - - - Break - - - - - Text - - - Description - State machine & sequencer: -SQ0 transition current state if conditions match -SQ1 read from memory A -SQ2 read from memory B -SQ3 write to memory -SQ4 counter inc - -Sequencer clocked by falling edge (NPCLK) -Everything else clocked by rising edge (PCLK) - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - ST_SECCLR - - - - - - Tunnel - - - rotation - - - - NetName - OVF_SECCLR - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - ST_EVAL - - - - - - Or - - - Inputs - 3 - - - - - - And - - - Inputs - 3 - - - - - - Tunnel - - - NetName - CLK_STAGE - - - - - - Tunnel - - - rotation - - - - NetName - PCLK - - - - - - Tunnel - - - rotation - - - - NetName - SQ_TRANS - - - - - - Counter - - - Label - STAGE - - - Bits - 2 - - - - - - Decoder - - - Selector Bits - 2 - - - flipSelPos - true - - - - - - Tunnel - - - NetName - ST_SECCLR - - - - - - VDD - - - - - Tunnel - - - NetName - ST_EVAL - - - - - - Tunnel - - - NetName - ST_RENDER - - - - - - Or - - - - - Tunnel - - - rotation - - - - NetName - CLK_STAGE - - - - - - Tunnel - - - rotation - - - - NetName - RST - - - - - - Or - - - - - Tunnel - - - rotation - - - - NetName - OVF_EVAL - - - - - - Tunnel - - - rotation - - - - NetName - OVF_SMN - - - - - - Tunnel - - - NetName - STAGE - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - SEC_C - - - - - - Ground - - - rotation - - - - - - - Tunnel - - - rotation - - - - NetName - STAGE - - - - - - Tunnel - - - rotation - - - - NetName - CLK_WRITE - - - - - - Tunnel - - - rotation - - - - NetName - CLK_READA - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - SEC_str - - - - - - VDD - - - rotation - - - - - - - Ground - - - rotation - - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - SEC_ld - - - - - - VDD - - - rotation - - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - SB_C - - - - - - Ground - - - rotation - - - - - - - Ground - - - rotation - - - - - - - Tunnel - - - rotation - - - - NetName - STAGE - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - SB_str - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - SB_ld - - - - - - VDD - - - rotation - - - - - - - Counter - - - Label - SEC CLR ADDR - - - Bits - 4 - - - - - - Or - - - - - Tunnel - - - rotation - - - - NetName - RST - - - - - - Tunnel - - - rotation - - - - NetName - CLK_WRITE - - - - - - Driver - - - Bits - 3 - - - - - - Tunnel - - - NetName - SEC_A - - - - - - Tunnel - - - NetName - ST_SECCLR - - - - - - Driver - - - Bits - 32 - - - - - - Tunnel - - - NetName - ST_SECCLR - - - - - - Tunnel - - - NetName - SEC_Din - - - - - - Ground - - - Bits - 32 - - - - - - Probe - - - - - Tunnel - - - rotation - - - - NetName - ST_SECCLR - - - - - - VDD - - - rotation - - - - - - - Ground - - - rotation - - - - - - - Ground - - - rotation - - - - - - - RAMDualPort - - - AddrBits - 3 - - - Label - SECONDARY - - - Bits - 32 - - - - - - Probe - - - Label - SEC_D - - - - - - Tunnel - - - rotation - - - - NetName - SEC_ld - - - - - - Tunnel - - - rotation - - - - NetName - SEC_str - - - - - - Tunnel - - - rotation - - - - NetName - SEC_A - - - - - - Tunnel - - - rotation - - - - NetName - SEC_Din - - - - - - Tunnel - - - rotation - - - - NetName - SEC_C - - - - - - RAMDualPort - - - AddrBits - 7 - - - Label - SCAN BUFFER - - - Bits - 16 - - - - - - Probe - - - Label - SB_D - - - - - - Tunnel - - - rotation - - - - NetName - SB_A - - - - - - Tunnel - - - rotation - - - - NetName - SB_Din - - - - - - Tunnel - - - rotation - - - - NetName - SB_str - - - - - - Tunnel - - - rotation - - - - NetName - SB_C - - - - - - Tunnel - - - rotation - - - - NetName - SB_ld - - - - - - Tunnel - - - rotation - - - - NetName - SB_A - - - - - - Tunnel - - - rotation - - - - NetName - SB_Din - - - - - - Ground - - - rotation - - - - Bits - 7 - - - - - - Ground - - - rotation - - - - Bits - 16 - - - - - - Out - - - Description - Scanline buffer data - - - Label - SB_D - - - Bits - 9 - - - - - - Ground - - - Bits - 9 - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - SM_C - - - - - - Ground - - - rotation - - - - - - - Tunnel - - - rotation - - - - NetName - STAGE - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - SM_str - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - SM_ld - - - - - - VDD - - - rotation - - - - - - - Tunnel - - - NetName - ST_IDLE - - - - - - Ground - - - rotation - - - - - - - Ground - - - rotation - - - - - - - Tunnel - - - rotation - - - - NetName - CLK_READA - - - - - - Rectangle - - - RectHeight - 40 - - - Label - Stage 2 Evaluate sprites - - - RectWidth - 35 - - - - - - Counter - - - Label - SMN - - - Bits - 7 - - - - - - Probe - - - - - Or - - - - - Tunnel - - - rotation - - - - NetName - RST - - - - - - Tunnel - - - rotation - - - - NetName - CLK_WRITE - - - - - - Tunnel - - - rotation - - - - NetName - SM_D - - - - - - Splitter - - - Input Splitting - 32 - - - Output Splitting - 8,10,10,1,1,1,1 - - - - - - Sub - - - Bits - 10 - - - - - - Ground - - - - - Tunnel - - - rotation - - - - NetName - SCY - - - - - - Comparator - - - Bits - 10 - - - - - - Const - - - Value - 8 - - - Bits - 10 - - - - - - Tunnel - - - NetName - YMATCH - - - - - - Tunnel - - - NetName - OVF_SMN - - - - - - Tunnel - - - rotation - - - - NetName - ST_EVAL - - - - - - Splitter - - - Input Splitting - 7 - - - Output Splitting - 6,1 - - - - - - Tunnel - - - NetName - SM_A - - - - - - Tunnel - - - NetName - ST_SECCLR - - - - - - LED - - - rotation - - - - - - - Tunnel - - - NetName - ST_EVAL - - - - - - LED - - - rotation - - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - TM_C - - - - - - Ground - - - rotation - - - - - - - Ground - - - rotation - - - - - - - Tunnel - - - rotation - - - - NetName - STAGE - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - TM_str - - - - - - Multiplexer - - - Selector Bits - 2 - - - - - - Tunnel - - - NetName - TM_ld - - - - - - VDD - - - rotation - - - - - - - Ground - - - rotation - - - - - - - RAMDualPort - - - AddrBits - 11 - - - Label - TILE MEM - - - Bits - 32 - - - - - - Tunnel - - - rotation - - - - NetName - TM_C - - - - - - Tunnel - - - rotation - - - - NetName - TM_str - - - - - - Tunnel - - - rotation - - - - NetName - TM_ld - - - - - - Text - - - Description - Tile mem addr: -8 bits select tile -3 bits select row in tile -= 11 bits total - - - - - - Tunnel - - - rotation - - - - NetName - TM_Din - - - - - - Ground - - - rotation - - - - Bits - 32 - - - - - - Probe - - - Label - TM_D - - - - - - Tunnel - - - rotation - - - - NetName - TM_A - - - - - - Tunnel - - - rotation - - - - NetName - TM_Din - - - - - - Text - - - Description - 8 bits tile pattern index -10 bits Y position -10 bits X position -1 bit H flip -1 bit V flip -1 bit behind background? (priority) -1 bit palette select -= total 4 bytes per sprite -x 64 sprites -= 128 words - - - - - - RAMDualPort - - - AddrBits - 6 - - - Label - SPRITE MEM H - - - Bits - 16 - - - - - - Tunnel - - - NetName - SM_D - - - - - - Tunnel - - - rotation - - - - NetName - DBUS - - - - - - Tunnel - - - rotation - - - - NetName - SM_A - - - - - - Tunnel - - - rotation - - - - NetName - SM_C - - - - - - Tunnel - - - rotation - - - - NetName - SM_ld - - - - - - Tunnel - - - rotation - - - - NetName - SM_str - - - - - - RAMDualPort - - - AddrBits - 6 - - - Label - SPRITE MEM L - - - Bits - 16 - - - - - - Tunnel - - - rotation - - - - NetName - DBUS - - - - - - Tunnel - - - rotation - - - - NetName - SM_A - - - - - - Tunnel - - - rotation - - - - NetName - SM_C - - - - - - Tunnel - - - rotation - - - - NetName - SM_ld - - - - - - Tunnel - - - rotation - - - - NetName - SM_str - - - - - - Splitter - - - Input Splitting - 16,16 - - - Output Splitting - 32 - - - - - - Probe - - - - - Counter - - - Label - Sequencer - - - Bits - 3 - - - - - - Decoder - - - Selector Bits - 3 - - - flipSelPos - true - - - - - - Tunnel - - - NetName - SQ_TRANS - - - - - - Tunnel - - - NetName - SQ_READA - - - - - - Tunnel - - - NetName - SQ_READB - - - - - - VDD - - - rotation - - - - - - - Tunnel - - - NetName - SQ_WRITE - - - - - - Or - - - - - Tunnel - - - rotation - - - - NetName - NPCLK - - - - - - Tunnel - - - rotation - - - - NetName - RST - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - SQ_READA - - - - - - Tunnel - - - rotation - - - - NetName - PCLK - - - - - - Tunnel - - - NetName - CLK_READA - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - ST_RENDER - - - - - - Tunnel - - - rotation - - - - NetName - OVF_RENDER - - - - - - Tunnel - - - NetName - SEC_D - - - - - - Splitter - - - Input Splitting - 4 - - - Output Splitting - 3,1 - - - - - - Tunnel - - - NetName - OVF_SECCLR - - - - - - Tunnel - - - NetName - SQ_CLR - - - - - - Or - - - - - Tunnel - - - rotation - - - - NetName - SQ_CLR - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - SQ_READB - - - - - - Tunnel - - - rotation - - - - NetName - PCLK - - - - - - Tunnel - - - NetName - CLK_READB - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - SQ_WRITE - - - - - - Tunnel - - - rotation - - - - NetName - PCLK - - - - - - Tunnel - - - NetName - CLK_WRITE - - - - - - Splitter - - - Input Splitting - 8,10,10,1,1,1,1 - - - Output Splitting - 32 - - - - - - Driver - - - Bits - 32 - - - - - - Tunnel - - - NetName - ST_EVAL - - - - - - Tunnel - - - NetName - SEC_Din - - - - - - In - - - Description - Scanline Y (0..524) - - - Label - SCY - - - Bits - 10 - - - - - - Tunnel - - - NetName - SCY - - - - - - In - - - Label - DBUS - - - Bits - 16 - - - - - - Tunnel - - - NetName - DBUS - - - - - - In - - - Description - Reset sprite evaluator - - - Label - RST - - - - - - Tunnel - - - NetName - RST - - - - - - And - - - Inputs - 3 - - - - - - Tunnel - - - rotation - - - - NetName - YMATCH - - - - - - Tunnel - - - rotation - - - - NetName - SQ_WRITE - - - - - - Tunnel - - - rotation - - - - NetName - PCLK - - - - - - Counter - - - Label - SEC ADDR - - - Bits - 4 - - - - - - Or - - - - - Tunnel - - - rotation - - - - NetName - RST - - - - - - Probe - - - - - Tunnel - - - NetName - OVF_EVAL - - - - - - Tunnel - - - rotation - - - - NetName - ST_EVAL - - - - - - Splitter - - - Input Splitting - 4 - - - Output Splitting - 3,1 - - - - - - Driver - - - Bits - 3 - - - - - - Tunnel - - - NetName - SEC_A - - - - - - Tunnel - - - NetName - ST_EVAL - - - - - - Rectangle - - - RectHeight - 30 - - - Label - Stage 3 Render line to scanbuf - - - RectWidth - 35 - - - - - - Tunnel - - - NetName - ST_RENDER - - - - - - LED - - - rotation - - - - - - - Counter - - - Label - SEC ADDR - - - Bits - 4 - - - - - - Probe - - - - - Tunnel - - - NetName - OVF_RENDER - - - - - - Tunnel - - - rotation - - - - NetName - ST_RENDER - - - - - - Or - - - - - Tunnel - - - rotation - - - - NetName - RST - - - - - - And - - - - - Tunnel - - - rotation - - - - NetName - SQ_READA - - - - - - Tunnel - - - rotation - - - - NetName - PCLK - - - - - - Splitter - - - Input Splitting - 4 - - - Output Splitting - 3,1 - - - - - - Driver - - - Bits - 3 - - - - - - Tunnel - - - NetName - SEC_A - - - - - - Tunnel - - - NetName - ST_RENDER - - - - - - Tunnel - - - rotation - - - - NetName - SEC_D - - - - - - Splitter - - - Input Splitting - 32 - - - Output Splitting - 8,10,10,1,1,1,1 - - - - - - Tunnel - - - NetName - ST_IDLE - - - - - - LED - - - rotation - - - - - - - Text - - - Description - Stage 4 Idle - - - - - - Tunnel - - - NetName - TM_A - - - - - - Driver - - - Bits - 11 - - - - - - Tunnel - - - NetName - ST_RENDER - - - - - - Splitter - - - Input Splitting - 3,8 - - - Output Splitting - 11 - - - - - - Splitter - - - Input Splitting - 10 - - - Output Splitting - 3,7 - - - - - - Tunnel - - - NetName - TM_D - - - - - - Tunnel - - - rotation - - - - NetName - CLK_READB - - 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- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 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Splitting + 4 + + + Output Splitting + 1*4 + + + + + + Out + + + Label + FZ + + + + + + Testcase + + + Testdata + + Y FZ +0x0 1 +0x1 0 +0xff 0 + + + + + + + NOr + + + Inputs + 4 + + + + + + Or + + + Bits + 4 + + + Inputs + 4 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/digital_diagrams/atk16_alu_inputs.dig b/digital_diagrams/atk16_alu_inputs.dig new file mode 100644 index 0000000..310bafb --- /dev/null +++ b/digital_diagrams/atk16_alu_inputs.dig @@ -0,0 +1,215 @@ + + + 2 + + + Description + Maps the R1 input to the A output. Uses OPCODE parity to mux either the R2 input (even parity) or the RW_S input, here acting as a small immediate value, to the B output. + + + romContent + + + + + + Width + 5 + + + + + In + + + Description + Register 1 value from regbank + + + Label + R1 + + + Bits + 16 + + + + + + In + + + Description + Register 2 value from regbank + + + Label + R2 + + + Bits + 16 + + + + + + Multiplexer + + + Bits + 16 + + + + + + In + + + Description + Register 2 selector + + + Label + R2_S + + + Bits + 3 + + + + + + In + + + Description + Immediate mode on? + + + Label + IM_M + + + + + + Out + + + Description + Output A + + + Label + A + + + Bits + 16 + + + + + + Out + + + Description + Output B + + + Label + B + + + Bits + 16 + + + + + + Splitter + + + Input Splitting + 3,13 + + + Output Splitting + 16 + + + + + + Ground + + + Bits + 13 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/digital_diagrams/atk16_decoder.dig b/digital_diagrams/atk16_decoder.dig new file mode 100644 index 0000000..b8eb088 --- /dev/null +++ b/digital_diagrams/atk16_decoder.dig @@ -0,0 +1,364 @@ + + + 2 + + + romContent + + + + + + Width + 5 + + + + + Register + + + valueIsProbe + true + + + Label + IR + + + Bits + 16 + + + + + + In + + + Label + DBUS + + + Bits + 16 + + + isHighZ + true + + + + + + In + + + Description + Instruction register input enable + + + Label + IR_IE + + + + + + In + + + Label + CLK + + + + + + Splitter + + + splitterSpreading + 2 + + + Input Splitting + 16 + + + Output Splitting + 3,3,3,3,4 + + + + + + Tunnel + + + NetName + DBUS + + + + + + Tunnel + + + rotation + + + + NetName + DBUS + + + + + + Out + + + Description + Opcode + + + Label + OP + + + Bits + 4 + + + + + + Out + + + Description + Write register selection + + + Label + RW_S + + + Bits + 3 + + + + + + Out + + + Description + ALU selection code + + + Label + ALU_S + + + Bits + 3 + + + + + + Out + + + Description + Read register 1 selection + + + Label + R1_S + + + Bits + 3 + + + + + + Out + + + Description + Read register 2 selection + + + Label + R2_S + + + Bits + 3 + + + + + + Splitter + + + Input Splitting + 16 + + + Output Splitting + 9, + + + + + + Driver + + + Bits + 16 + + + flipSelPos + true + + + + + + Tunnel + + + NetName + DBUS + + + + + + In + + + Description + Low 9 bits immediate value output enable + + + Label + LI_OE + + + + + + Testcase + + + Testdata + + CLK DBUS IR_IE LI_OE OP RW_S R1_S R2_S ALU_S +C 0b0000001010011000 1 0 0 1 2 3 0 + + + + + + + BitExtender + + + inputBits + 9 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/digital_diagrams/atk16_graphics_mode.dig b/digital_diagrams/atk16_graphics_mode.dig new file mode 100644 index 0000000..2d05dd6 --- /dev/null +++ b/digital_diagrams/atk16_graphics_mode.dig @@ -0,0 +1,311 @@ + + + 2 + + + romContent + + + + + + Width + 5 + + + + + In + + + Label + DBUS + + + Bits + 16 + + + + + + Out + + + Description + 00 disabled +01 text mode +10 sprite mode +11 undefined + + + Label + MODE + + + Bits + 2 + + + + + + Register + + + Label + GRAPHICS MODE + + + Bits + 2 + + + + + + And + + + Inputs + 13 + + + + + + Splitter + + + Input Splitting + 13 + + + Output Splitting + 1*13 + + + + + + And + + + + + Splitter + + + Input Splitting + 16 + + + Output Splitting + 2,14 + + + + + + In + + + Label + MMIO_S + + + Bits + 13 + + + + + + In + + + Label + MMIO_IE + + + + + + Const + + + Value + 2 + + + Bits + 13 + + + + + + XNOr + + + Bits + 13 + + + + + + In + + + Label + CLK + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/digital_diagrams/atk16_irc.dig b/digital_diagrams/atk16_irc.dig new file mode 100644 index 0000000..0037fa0 --- /dev/null +++ b/digital_diagrams/atk16_irc.dig @@ -0,0 +1,341 @@ + + + 2 + + + romContent + + + + + + Width + 5 + + + + + In + + + Description + IRQ lines + + + Label + IRQ + + + Bits + 4 + + + + + + In + + + Description + PC value + + + Label + PC + + + Bits + 16 + + + + + + Splitter + + + Input Splitting + 4 + + + Output Splitting + 1*4 + + + + + + Text + + + Description + Some IRQ active? + + + + + + In + + + Label + MAR_IE + + + + + + And + + + + + Multiplexer + + + Bits + 16 + + + + + + Out + + + Label + DBUS + + + Bits + 16 + + + + + + Driver + + + Bits + 16 + + + flipSelPos + true + + + + + + In + + + Label + PC_OE + + + + + + PriorityEncoder + + + Selector Bits + 2 + + + + + + Const + + + Value + 17 + + + Bits + 16 + + + + + + Multiplexer + + + Selector Bits + 2 + + + Bits + 16 + + + + + + Const + + + Value + 16 + + + Bits + 16 + + + + + + Const + + + Value + 18 + + + Bits + 16 + + + + + + Const + + + Value + 19 + + + Bits + 16 + + + + + + Testcase + + + Testdata + + IRQ PC MAR_IE PC_OE DBUS +0b0000 0x5 0 0 Z +0b0000 0x5 0 1 0x5 +0b0001 0x5 0 1 0x5 +0b0001 0x5 1 1 0x10 +0b0101 0x5 1 1 0x12 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/digital_diagrams/atk16_jump_unit.dig b/digital_diagrams/atk16_jump_unit.dig new file mode 100644 index 0000000..4ccd266 --- /dev/null +++ b/digital_diagrams/atk16_jump_unit.dig @@ -0,0 +1,193 @@ + + + 2 + + + Description + Uses OPCODE parity to choose between relative addressing mode (even parity) or absolute addressing mode (odd parity). + + + romContent + + + + + + Width + 5 + + + + + In + + + Description + Jump address + + + Label + ADDR + + + Bits + 16 + + + + + + In + + + Description + PC value + + + Label + PC + + + Bits + 16 + + + + + + In + + + Description + Immediate mode on? + + + Label + IM_M + + + + + + Out + + + Description + Result PC value + + + Label + PC_RES + + + Bits + 16 + + + + + + Add + + + Bits + 16 + + + + + + Multiplexer + + + Bits + 16 + + + + + + Ground + + + + + Testcase + + + Testdata + + PC ADDR IM_M PC_RES +10 20 0 20 +10 20 1 30 + + + + + + + Not + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/digital_diagrams/atk16_mem.dig b/digital_diagrams/atk16_mem.dig new file mode 100644 index 0000000..6ff9810 --- /dev/null +++ b/digital_diagrams/atk16_mem.dig @@ -0,0 +1,949 @@ + + 2 + + + romContent + + + + + + Width + 7 + + + + + EEPROM + + + AddrBits + 15 + + + isProgramMemory + true + + + Label + MEM_ROM + + + Bits + 16 + + + Data + 4014,2e00,1dc0,6026,8000,8000,8000,8000,8000,8000,8000,8000,8000,8000,8000,8000,001b,001a,001a,001a,8000,e000,e001,e002,e800,f800,f000,31c0,1fc8,31c8,1fc8,4016,2000,2000,4215,2240,3040,1fc9,23c0,1fc9,21c0,e000,4017,2000,4200,3008,600d,0008,0000,0001,0002,0017,0019,9000,0100,0031,0061,0062,0063,0032,402f,2000,0fc0,4433,2480,31d0,1fc8,1fc9,25c0,2480,31d0,1fc8,1fc9,21c0,4200,0270,3040,4434,2480,31d0,1fc8,1fc9,25c0,2480,31d0,1fc8,1fc9,21c0,4201,0270,3040,4000,0180,2000,31c0,1fc8,4031,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4000,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4037,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4001,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4038,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4002,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4039,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4003,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,403a,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4004,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,403b,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4035,2000,31c0,1fc8,4005,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4435,2480,31d0,1fc8,1fc9,21c0,4202,0270,3040,4400,31d0,1fc8,1fc9,21c0,4203,0270,3040,4402,0590,2480,31d0,1fc8,1fc9,25c0,2480,31d0,1fc8,1fc9,21c0,4204,0270,3040,4400,31d0,1fc8,1fc9,21c0,4205,0270,3040,4201,31c8,1fc8,1fc9,21c0,1000,8451,4435,2480,31d0,1fc8,4403,0590,2480,31d0,1fc8,1fc9,27c0,1fc9,25c0,0498,31d0,1fc8,1fc9,21c0,4206,0270,3040,4406,0590,2480,31d0,1fc8,1fc9,25c0,2480,31d0,1fc8,1fc9,21c0,4207,0270,3040,4007,0180,2000,31c0,1fc8,4000,31c0,1fc8,1fc9,21c0,1000,8402,6020,6000,4407,0590,2480,31d0,1fc8,1fc9,21c0,4205,0270,3040,4403,0590,2480,31d0,1fc8,4401,31d0,1fc8,1fc9,27c0,1fc9,25c0,0498,31d0,1fc8,1fc9,21c0,4203,0270,3040,61a8,4001,0180,2000,31c0,1fc8,4000,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4004,0180,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4001,0180,2000,31c0,1fc8,4001,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,4005,0180,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,1f80,f000 + + + + + + Ground + + + rotation + + + + + + + VDD + + + rotation + + + + + + + VDD + + + rotation + + + + + + + In + + + Description + Address + + + Label + ADDR + + + Bits + 16 + + + + + + Splitter + + + Input Splitting + 16 + + + Output Splitting + 13,1,1,1 + + + + + + atk16_mem_mux.dig + + + + + Splitter + + + Input Splitting + 13,1,1 + + + Output Splitting + 15 + + + + + + Splitter + + + Input Splitting + 1,1 + + + Output Splitting + 2 + + + + + + Demultiplexer + + + Selector Bits + 2 + + + Bits + 15 + + + + + + Probe + + + Label + ROM_OUT + + + + + + Driver + + + Bits + 16 + + + flipSelPos + true + + + + + + Demultiplexer + + + Selector Bits + 2 + + + flipSelPos + true + + + + + + Tunnel + + + NetName + RAM_IE + + + + + + In + + + Description + Data bus + + + Label + DBUS + + + Bits + 16 + + + isHighZ + true + + + + + + Tunnel + + + NetName + CLK + + + + + + RAMDualPort + + + AddrBits + 15 + + + Label + MEM_RAM + + + Bits + 16 + + + + + + VDD + + + rotation + + + + + + + Tunnel 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MMIO_S + + + + + + Tunnel + + + NetName + MEM_IE + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/digital_diagrams/atk16_mem_mux.dig b/digital_diagrams/atk16_mem_mux.dig new file mode 100644 index 0000000..d4be584 --- /dev/null +++ b/digital_diagrams/atk16_mem_mux.dig @@ -0,0 +1,276 @@ + + + 2 + + + + Out + + + Label + X + + + Inputs + 1 + + + + + + And + + + wideShape + true + + + Inputs + 3 + + + + + + Out + + + Label + Y + + + Inputs + 1 + + + + + + Or + + + wideShape + true + + + + + + And + + + wideShape + true + + + + + + And + + + wideShape + true + + + + + + In + + + rotation + + + + Label + C + + + + + + In + + + rotation + + + + Label + B + + + + + + Not + + + rotation + + + + + + + In + + + rotation + + + + Label + A + + + + + + Not + + + rotation + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/digital_diagrams/atk16_peripherals.dig b/digital_diagrams/atk16_peripherals.dig new file mode 100644 index 0000000..c8eb7b5 --- /dev/null +++ b/digital_diagrams/atk16_peripherals.dig @@ -0,0 +1,852 @@ + + + 2 + + + romContent + + + + + + Width + 6 + + + + + Splitter + + + Input Splitting + 1*4 + + + Output Splitting + 4 + + + + + + Out + + + Label + IRQ + + + Bits + 4 + + + + + + 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