From 6f68c0febdbfd6138fa95f77bc09785bde8a8371 Mon Sep 17 00:00:00 2001 From: Jan Tuomi Date: Sat, 11 Nov 2023 23:13:43 +0200 Subject: Add function defs & calls --- asm/test_py_src.atk16 | 266 ++++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 236 insertions(+), 30 deletions(-) (limited to 'asm/test_py_src.atk16') diff --git a/asm/test_py_src.atk16 b/asm/test_py_src.atk16 index ca44267..02752ec 100644 --- a/asm/test_py_src.atk16 +++ b/asm/test_py_src.atk16 @@ -73,50 +73,256 @@ ;; END BOOTSTRAP +@label text_mode + 1 +@label graphics_mode_addr_p + 23 +@label text_mem_addr_p + 25 +@label int_1 + 104 +@label int_2 + 105 - -; +; @label func -; stack frame: ['arg1', 'arg2', 'a'] +; stack frame names: ['return_address_0', 'arg1', 'arg2', 'a'] addi SP 1 SP -; (arg1) - ldi ${SP - 3} RA +; +; assigning a to stack segment + offset 7 +; (arg1) + ldi vt_stack_addr RC + ldr RC RC + ldi 5 RD + add RC RD RC + ldr RC RC + spu RC + ldi vt_stack_addr RA + ldr RA RA + ldi 7 RB + add RA RB RA + spo RB + str RB RA +; + ldi vt_stack_addr RA + ldr RA RA + ldi 4 RB + add RA RB RA +; +; BinOp lhs +; (a) + ldi vt_stack_addr RC + ldr RC RC + ldi 7 RD + add RC RD RC + ldr RC RC + spu RC +; BinOp rhs +; (a) + ldi vt_stack_addr RC + ldr RC RC + ldi 7 RD + add RC RD RC + ldr RC RC + spu RC + spo RD + spo RC + add RC RD RC + spu RC + spo RB + mov RA SP + ldr RA RA + spu RB +; return from function + jpr RA + +@label main +; stack frame names: ['i', 'graphics_mode_addr', 'text_mem_addr', 'b'] + addi SP 4 SP +; +; assigning graphics_mode_addr to stack segment + offset 1 +; +; Builtin call load [] +; (GRAPHICS_MODE_ADDR_P) + ldi graphics_mode_addr_p RC + ldr RC RC + spu RC + spo RC + ldr RC RC + spu RC + ldi vt_stack_addr RA + ldr RA RA + ldi 1 RB + add RA RB RA + spo RB + str RB RA +; +; assigning text_mem_addr to stack segment + offset 2 +; +; Builtin call load [] +; (TEXT_MEM_ADDR_P) + ldi text_mem_addr_p RC + ldr RC RC + spu RC + spo RC + ldr RC RC + spu RC + ldi vt_stack_addr RA + ldr RA RA + ldi 2 RB + add RA RB RA + spo RB + str RB RA +; +; Builtin call store [, ] +; (graphics_mode_addr) + ldi vt_stack_addr RA + ldr RA RA + ldi 1 RB + add RA RB RA ldr RA RA spu RA +; (TEXT_MODE) + ldi text_mode RA + ldr RA RA + spu RA + spo RB spo RA - ldi ${SP - 1} RB - str RA RB -; -; -; BinOp lhs -; (a) - ldi ${SP - 1} RA + str RB RA +; +; assigning b to stack segment + offset 3 +; +; Call function func + ldi 0 RC + spu RC +; + ldi 1 RC + spu RC +; + ldi 3 RC + spu RC +; set up return address and jump to subroutine + subi SP 3 RC + lpc RD + addi RD 3 RD + str RD RC + jpi func + ldi vt_stack_addr RA + ldr RA RA + ldi 3 RB + add RA RB RA + spo RB + str RB RA +; +; assigning i to stack segment + offset 0 +; + ldi 0 RC + spu RC + ldi vt_stack_addr RA + ldr RA RA + ldi 0 RB + add RA RB RA + spo RB + str RB RA +; +; Builtin call store [, ] +; +; BinOp lhs +; (text_mem_addr) + ldi vt_stack_addr RA + ldr RA RA + ldi 2 RB + add RA RB RA ldr RA RA spu RA -; BinOp rhs -; (a) - ldi ${SP - 1} RA +; BinOp rhs +; (i) + ldi vt_stack_addr RA + ldr RA RA + ldi 0 RB + add RA RB RA ldr RA RA spu RA spo RB spo RA add RA RB RA spu RA - subi SP 1 SP - rsr - -@label main -; stack frame: ['b'] - addi SP 1 SP -; -; - ldi 1 RA +; +; Builtin call ord [] +; + ldi int_1 RA + ldr RA RA + spu RA + spo RB + spo RA + str RB RA +; +; assigning i to stack segment + offset 0 +; +; BinOp lhs +; (i) + ldi vt_stack_addr RC + ldr RC RC + ldi 0 RD + add RC RD RC + ldr RC RC + spu RC +; BinOp rhs +; + ldi 1 RC + spu RC + spo RD + spo RC + add RC RD RC + spu RC + ldi vt_stack_addr RA + ldr RA RA + ldi 0 RB + add RA RB RA + spo RB + str RB RA +; +; Builtin call store [, ] +; +; BinOp lhs +; (text_mem_addr) + ldi vt_stack_addr RA + ldr RA RA + ldi 2 RB + add RA RB RA + ldr RA RA + spu RA +; BinOp rhs +; (i) + ldi vt_stack_addr RA + ldr RA RA + ldi 0 RB + add RA RB RA + ldr RA RA spu RA -; - ldi 3 RA + spo RB + spo RA + add RA RB RA + spu RA +; +; Builtin call ord [] +; + ldi int_2 RA + ldr RA RA spu RA - csi func + spo RB spo RA - ldi ${SP - 1} RB - str RA RB - subi SP 1 SP + str RB RA +; +@label while_test_3 +; + ldi 1 RB + spu RB + spo RA + addi RA 0 RA + bri zero While_else_4 +; + jpi While_test_3 +@label while_else_4 +@label while_end_5 + subi SP 4 SP -- cgit v1.3