From 927c018f12e73c254cec32c0f60e1c01b9fc0319 Mon Sep 17 00:00:00 2001 From: Jan Tuomi Date: Wed, 21 Feb 2024 12:07:07 +0200 Subject: Refactor names --- atk16_asm/asm_pass4.py | 61 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 atk16_asm/asm_pass4.py (limited to 'atk16_asm/asm_pass4.py') diff --git a/atk16_asm/asm_pass4.py b/atk16_asm/asm_pass4.py new file mode 100644 index 0000000..2fff870 --- /dev/null +++ b/atk16_asm/asm_pass4.py @@ -0,0 +1,61 @@ +from dataclasses import dataclass +from asm_ops import * +from asm_eval import * +from asm_pass3 import * + +@dataclass +class Result4Line: + line_num: int + src_file: str + address: int + word: int + text: str + original_text: str + +@dataclass +class Result4: + lines: list[Result4Line] + operations: OpExpansionDict + symbols: dict[str, int] + +def pass_4(result3: Result3) -> Result4: + result_lines: list[Result4Line] = [] + + for line in result3.lines: + keyword, *args = line.parts + meta = Meta( + address=line.address, + ) + + text = " ".join([keyword, *args]) + original_text = " ".join(line.original_parts) + + if keyword in operations: + fn = operations[keyword] + word = fn(meta, result3.symbols, *args) + result_lines.append(Result4Line( + line_num=line.line_num, + src_file=line.src_file, + address=line.address, + word=word, + text=text, + original_text=original_text, + )) + else: + try: + result_lines.append(Result4Line( + line_num=line.line_num, + src_file=line.src_file, + address=line.address, + word=eval_expr(result3.symbols, keyword), + text=text, + original_text=original_text, + )) + except: + raise Exception(f"Invalid assembly at {line.src_file}:{line.line_num + 1}\n\n{line}") + + return Result4( + operations=result3.operations, + symbols=result3.symbols, + lines=result_lines, + ) -- cgit v1.3