top top n13 rx_done c35 clk data done rx uart_rx_inst uart_rx n13:e->c35:w c42 A $2 $logic_not Y n13:e->c42:w p6 PROC $1 top.v:31.5-70.8 n13:e->p6:w n14 data_to_receive c30 A B $5 $eq Y n14:e->c30:w n14:e->c35:w n14:e->p6:w n15 state n15:e->p6:w n16 letter_a n16:e->c30:w n17 tx_busy c39 busy clk data start tx uart_inst uart_tx n17:e->c39:w c40 A $4 $logic_not Y n17:e->c40:w c41 A $3 $logic_not Y n17:e->c41:w n18 data_to_send n18:e->c39:w n18:e->p6:w n19 start_tx n19:e->c39:w n19:e->p6:w n20 LED2 n21 LED1 x8 n21:e->x8:w n22 SERIAL_TX n22:e->c39:w n23 SERIAL_RX n23:e->c35:w n24 SYSCLK n24:e->c35:w n24:e->c39:w n24:e->p6:w v0 1 c29 A B S $6 $mux Y v0:e->c29:w v1 0 v1:e->c29:w x7 0:0 - 0:0 c29:e->x7:w c30:e->c29:w c40:e->p6:w c41:e->p6:w c42:e->p6:w p2 PROC $10 top.v:28.15-28.35 p2:e->n15:w p3 PROC $9 top.v:19.15-19.31 p3:e->n16:w p4 PROC $8 top.v:15.15-15.34 p4:e->n18:w p5 PROC $7 top.v:13.9-13.24 p5:e->n19:w p6:e->n15:w p6:e->n18:w p6:e->n19:w x7:e->n21:w x8:e->n20:w