2 romContent Width 7 EEPROM AddrBits 15 isProgramMemory true Label MEM_ROM Bits 16 Data 4014,2e00,1dc0,6027,8000,8000,8000,8000,8000,8000,8000,8000,8000,8000,8000,8000,001c,001a,001a,001a,8000,e000,e001,e002,e800,f800,4855,f000,31c0,1fc8,31c8,1fc8,4016,2000,2000,4215,2240,3040,1fc9,23c0,1fc9,21c0,e000,4017,2000,4200,3008,6018,0001,0017,0019,0041,001a,4433,2480,31d0,1fc8,4400,0590,2480,31d0,1fc8,1fc9,27c0,1fc9,25c0,0498,31d0,1fc8,1d89,2380,5040,1fd8,4431,2480,31d0,1fc8,1fc9,25c0,2480,31d0,1fc8,1fc9,21c0,4200,0270,3040,4432,2480,31d0,1fc8,1fc9,25c0,2480,31d0,1fc8,1fc9,21c0,4201,0270,3040,4000,0180,2000,31c0,1fc8,4030,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4400,31d0,1fc8,1fc9,21c0,4202,0270,3040,4202,0388,2240,31c8,1fc8,4234,2240,31c8,1fc8,1fc9,25c0,1fc9,23c0,0251,8004,4200,31c8,1fc8,6003,4201,31c8,1fc8,1fc9,21c0,1000,8447,4001,0180,2000,31c0,1fc8,4002,0180,2000,31c0,1fc8,1fc9,23c0,1fc9,21c0,0008,31c0,1fc8,31f0,1fc8,4000,31c0,1fc8,4002,0180,2000,31c0,1fc8,1dd1,9000,1020,3180,1d88,617a,1fc9,21c0,1f80,1fc9,2dc0,31c0,1fc8,1fc9,23c0,1fc9,21c0,3008,4000,31c0,1fc8,1fc9,21c0,4402,0590,2480,31d0,1fc8,4401,31d0,1fc8,1fc9,27c0,1fc9,25c0,0498,31d0,1fc8,1fc9,21c0,4202,0270,3040,619f,4201,31c8,1fc8,1fc9,21c0,1000,8401,61f8,1f80,f000 Ground rotation VDD rotation VDD rotation In Description Address Label ADDR Bits 16 Splitter Input Splitting 16 Output Splitting 13,1,1,1 atk16_mem_mux.dig Splitter Input Splitting 13,1,1 Output Splitting 15 Splitter Input Splitting 1,1 Output Splitting 2 Demultiplexer Selector Bits 2 Bits 15 Probe Label ROM_OUT Driver Bits 16 flipSelPos true Demultiplexer Selector Bits 2 flipSelPos true Tunnel NetName RAM_IE In Description Data bus Label DBUS Bits 16 isHighZ true Tunnel NetName CLK RAMDualPort AddrBits 15 Label MEM_RAM Bits 16 VDD rotation Tunnel rotation NetName CLK Tunnel rotation NetName RAM_IE Tunnel rotation NetName DBUS Probe Label RAM_OUT Driver Bits 16 In Description Clock Label CLK Out Description Memory-mapped I/O word input enable Label MMIO_IE Out Description Memory-mapped I/O word output enable Label MMIO_OE Tunnel NetName MMIO_S Testcase Testdata CLK ADDR MEM_IE MEM_OE DBUS DBUS_out # read ROM program(0xFF) C 0x0 0 1 Z 0xFF # read RAM memory MEM_RAM(0x0)=0x55; C 0 0 0 Z X C 0x8000 0 1 Z 0x55 # write to RAM C 0x8000 1 0 0xAA 0xAA C 0x8000 0 1 Z 0xAA In Description Memory input enable Label MEM_IE In Description Memory output enable Label MEM_OE And rotation Tunnel NetName RAM_OE Tunnel NetName MEM_OE Tunnel NetName MEM_OE Tunnel NetName DBUS And rotation Tunnel NetName ROM_OE Tunnel NetName MEM_OE Tunnel NetName DBUS Tunnel NetName DBUS Decoder Selector Bits 2 flipSelPos true Tunnel NetName ROM_OE Tunnel NetName RAM_OE Tunnel NetName MMIO_OE Tunnel NetName MMIO_IE And Tunnel rotation NetName MEM_OE Tunnel rotation NetName MMIO_OE And Tunnel rotation NetName MEM_IE Tunnel rotation NetName MMIO_IE Out Description Memory-mapped I/O word selector Label MMIO_S Bits 13 Tunnel rotation NetName MMIO_S Tunnel NetName MEM_IE