2 romContent Width 6 Out Label PR Bits 2 Out Label PG Bits 2 Out Label PB Bits 2 In Description MMI/O selector Label MMIO_S Bits 13 In Label MMIO_IE In Label MMIO_OE Tunnel NetName MMIO_IE Tunnel NetName MMIO_OE Tunnel NetName MMIO_S In Description Pixel clock Label PCLK Tunnel NetName PCLK In Description CPU clock Label CLK Tunnel NetName CLK In Description Data bus Label DBUS Bits 16 Tunnel NetName DBUS In Description X pixel Label X Bits 9 Tunnel NetName X In Description Y pixel Label Y Bits 8 ROM AddrBits 11 Label CHARMEM Bits 8 Splitter Input Splitting 8,3 Output Splitting 11 VDD rotation RAMDualPort AddrBits 11 Label TEXTMEM Bits 8 Tunnel rotation NetName Y Splitter Input Splitting 8 Output Splitting 5,3 Tunnel NetName CY Tunnel NetName TY Tunnel rotation NetName X Splitter Input Splitting 9 Output Splitting 6,3 Tunnel NetName TX Tunnel NetName CX Splitter Input Splitting 5,6 Output Splitting 11 Tunnel rotation NetName TY Tunnel rotation NetName TX Tunnel rotation NetName CCOLOR Splitter Input Splitting 1,1 Output Splitting 2 BitSelector Selector Bits 3 Tunnel NetName CX Tunnel NetName CCOLOR Ground rotation Bits 8 Ground rotation Tunnel rotation NetName CLK VDD rotation Tunnel NetName CHAR_S Tunnel rotation NetName CY Tunnel rotation NetName CHAR_S Tunnel NetName Y