2 romContent Width 7 EEPROM AddrBits 15 isProgramMemory true Label MEM_ROM Bits 16 Data 4014,2e00,6019,13*8000,e0,1a,1a,1a,8000,e000,e001,e002,e800,f800 ,4855,f000,4017,2000,4200,3008,6015,31d8,1fc8,31e0,1fc8,4600,859 ,8404,818,3110,16c8,61fa,1fc9,29c0,1fc9,27c0,31f0,1fc9,2dc0,1fc8 ,5180,800,4019,2000,4235,2240,4400,4c3f,31f0,1fc8,61e2,2dc0,1fc9 ,6001,f840,4442,2480,4220,3088,1488,4248,3088,1488,4245,3088,1488 ,424c,3088,1488,424c,3088,1488,424f,3088,1488,4220,3088,1488,4223 ,3088,1488,4276,3088,1488,4261,3088,1488,4269,3088,1488,426e,3088 ,1488,4263,3088,1488,426f,3088,1488,426f,3088,1488,4264,3088,1488 ,4269,3088,1488,426a,3088,1488,4275,3088,1488,4274,3088,1488,4275 ,3088,1488,4274,3088,1488,14b5,1488,14b7,4220,3088,1488,42bb,3088 ,1488,42bb,3088,1488,42bb,3088,1488,42bb,3088,1488,4220,3088,1488 ,4242,3088,1488,4259,3088,1488,4220,3088,1488,4240,3088,1488,426b ,3088,1488,4261,3088,1488,426c,3088,1488,425f,3088,1488,426a,3088 ,1488,4261,3088,1488,426e,3088,1488,4220,3088,1488,42bb,3088,1488 ,42bb,3088,1488,42bb,3088,1488,42bb,3088,1488,14b5,1488,14b7,14b5 ,1488,14b7,4220,3088,1488,423e,3088,1488,4220,3088,1488,4a17,2b40 ,4c01,3170,61ff,31c0,1fc8,31c8,1fc8,31d8,1fc8,4016,2000,2000,4215 ,2240,1600,16e9,16e9,8407,1600,16e9,16d9,8410,3080,1488,6012,14b5 ,1488,14b7,4220,3088,1488,423e,3088,1488,4220,3088,1488,6005,1489 ,4220,3088,1488,1489,1fc9,27c0,1fc9,23c0,1fc9,21c0,e000 Ground rotation VDD rotation VDD rotation In Description Address Label ADDR Bits 16 Splitter Input Splitting 16 Output Splitting 13,1,1,1 atk16_mem_mux.dig Splitter Input Splitting 13,1,1 Output Splitting 15 Splitter Input Splitting 1,1 Output Splitting 2 Demultiplexer Selector Bits 2 Bits 15 Probe Label ROM_OUT Driver Bits 16 flipSelPos true Demultiplexer Selector Bits 2 flipSelPos true Tunnel NetName RAM_IE In Description Data bus Label DBUS Bits 16 isHighZ true Tunnel NetName CLK RAMDualPort AddrBits 15 Label MEM_RAM Bits 16 VDD rotation Tunnel rotation NetName CLK Tunnel rotation NetName RAM_IE Tunnel rotation NetName DBUS Probe Label RAM_OUT Driver Bits 16 In Description Clock Label CLK Out Description Memory-mapped I/O word input enable Label MMIO_IE Out Description Memory-mapped I/O word output enable Label MMIO_OE Tunnel NetName MMIO_S Testcase Testdata CLK ADDR MEM_IE MEM_OE DBUS DBUS_out # read ROM program(0xFF) C 0x0 0 1 Z 0xFF # read RAM memory MEM_RAM(0x0)=0x55; C 0 0 0 Z X C 0x8000 0 1 Z 0x55 # write to RAM C 0x8000 1 0 0xAA 0xAA C 0x8000 0 1 Z 0xAA In Description Memory input enable Label MEM_IE In Description Memory output enable Label MEM_OE And rotation Tunnel NetName RAM_OE Tunnel NetName MEM_OE Tunnel NetName MEM_OE Tunnel NetName DBUS And rotation Tunnel NetName ROM_OE Tunnel NetName MEM_OE Tunnel NetName DBUS Tunnel NetName DBUS Decoder Selector Bits 2 flipSelPos true Tunnel NetName ROM_OE Tunnel NetName RAM_OE Tunnel NetName MMIO_OE Tunnel NetName MMIO_IE And Tunnel rotation NetName MEM_OE Tunnel rotation NetName MMIO_OE And Tunnel rotation NetName MEM_IE Tunnel rotation NetName MMIO_IE Out Description Memory-mapped I/O word selector Label MMIO_S Bits 13 Tunnel rotation NetName MMIO_S Tunnel NetName MEM_IE