3 files changed, 104 insertions, 8 deletions
diff --git a/asm/ext_std.py b/asm/ext_std.py
new file mode 100644
index 0000000..11da8aa
--- /dev/null
+++ b/asm/ext_std.py
@@ -0,0 +1,97 @@
+from asm_ops import *
+
+def expand_add(left: str, right: str, target: str) -> ExpandResult:
+  return [["alr", "al_plus", left, right, target]]
+
+def expand_sub(left: str, right: str, target: str) -> ExpandResult:
+  return [["alr", "al_minus", left, right, target]]
+
+def expand_addi(left: str, imm: str, target: str) -> ExpandResult:
+  return [["ali", "al_plus", left, imm, target]]
+
+def expand_subi(left: str, imm: str, target: str) -> ExpandResult:
+  return [["ali", "al_minus", left, imm, target]]
+
+def expand_and(left: str, right: str, target: str) -> ExpandResult:
+  return [["alr", "al_and", left, right, target]]
+
+def expand_or(left: str, right: str, target: str) -> ExpandResult:
+  return [["alr", "al_or", left, right, target]]
+
+def expand_xor(left: str, right: str, target: str) -> ExpandResult:
+  return [["alr", "al_xor", left, right, target]]
+
+def expand_sll(left: str, right: str, target: str) -> ExpandResult:
+  return [["alr", "al_sll", left, right, target]]
+
+def expand_slr(left: str, right: str, target: str) -> ExpandResult:
+  return [["alr", "al_slr", left, right, target]]
+
+def expand_sar(left: str, right: str, target: str) -> ExpandResult:
+  return [["alr", "al_sar", left, right, target]]
+
+def expand_slli(left: str, imm: str, target: str) -> ExpandResult:
+  return [["ali", "al_sll", left, imm, target]]
+
+def expand_slri(left: str, imm: str, target: str) -> ExpandResult:
+  return [["ali", "al_slr", left, imm, target]]
+
+def expand_sari(left: str, imm: str, target: str) -> ExpandResult:
+  return [["ali", "al_sar", left, imm, target]]
+
+def expand_inc(reg: str) -> ExpandResult:
+  return [["ali", "al_plus", reg, "1", reg]]
+
+def expand_dec(reg: str) -> ExpandResult:
+  return [["ali", "al_minus", reg, "1", reg]]
+
+def expand_mov(from_reg: str, to_reg: str) -> ExpandResult:
+  return [["ali", "al_plus", from_reg, "0", to_reg]]
+
+def expand_spu(reg: str) -> ExpandResult:
+  return [["str", reg, "__STACK_POINTER"]] + expand_inc("__STACK_POINTER")
+
+def expand_spo(reg: str):
+  return expand_dec("__STACK_POINTER") + [["ldr", "__STACK_POINTER", reg]]
+
+def expand_csr(addr_reg: str):
+  return [
+    ["lpc", "__CSR_SCRATCH"],
+    *expand_addi("__CSR_SCRATCH", "4", "__CSR_SCRATCH"),
+    *expand_spu("__CSR_SCRATCH"),
+    ["jpr", addr_reg]
+  ]
+
+def expand_csi(addr_imm: str):
+  return [
+    ["lpc", "__CSR_SCRATCH"],
+    *expand_addi("__CSR_SCRATCH", "4", "__CSR_SCRATCH"),
+    *expand_spu("__CSR_SCRATCH"),
+    ["jpi", addr_imm]
+  ]
+def expand_rsr():
+  return expand_spo("__CSR_SCRATCH") + [["jpr", "__CSR_SCRATCH"]]
+
+expansions: OpExpansionDict = {
+  "add": expand_add,
+  "sub": expand_sub,
+  "addi": expand_addi,
+  "subi": expand_subi,
+  "and": expand_and,
+  "or": expand_or,
+  "xor": expand_xor,
+  "sll": expand_sll,
+  "slr": expand_slr,
+  "sar": expand_sar,
+  "slli": expand_slli,
+  "slri": expand_slri,
+  "sari": expand_sari,
+  "inc": expand_inc,
+  "dec": expand_dec,
+  "mov": expand_mov,
+  "spu": expand_spu,
+  "spo": expand_spo,
+  "csr": expand_csr,
+  "csi": expand_csi,
+  "rsr": expand_rsr,
+}
diff --git a/asm/fibo.atk16 b/asm/fibo.atk16
index 8bb7a6e..198ae8b 100644
--- a/asm/fibo.atk16
+++ b/asm/fibo.atk16
@@ -6,12 +6,11 @@
   jpi program
 
 ; data segment
-@label ram_offset
-  0x8000
+@include ram_offset
 
 @label program
 ; set up stack pointer to point to beginning of RAM
-  ldi ram_offset RA
+  ldi ram_offset_addr RA
   ldr RA RF
 
 ; call fibo subroutine with parameter 10
@@ -20,11 +19,9 @@
   hlt
 
 @label fibo
-; function fibo
-; parameters:
-;  RA   n : u16
-; return value:
-;  RA   fibo(n) : u16
+;? subroutine fibo
+;? param RA N
+;? return RA Nth fibonacci number
 
 ; store RB, RC on stack
   spu RB
diff --git a/asm/ram_offset.atk16 b/asm/ram_offset.atk16
new file mode 100644
index 0000000..e8c9255
--- /dev/null
+++ b/asm/ram_offset.atk16
@@ -0,0 +1,2 @@
+@label ram_offset_addr
+  0x8000