2 files changed, 98 insertions, 0 deletions
diff --git a/asm/fibo.atk16 b/asm/fibo.atk16
new file mode 100644
index 0000000..8bb7a6e
--- /dev/null
+++ b/asm/fibo.atk16
@@ -0,0 +1,66 @@
+@opt stack_pointer RF
+@opt csr_scratch RH
+@use ext_std:*
+
+; jump over data segment
+  jpi program
+
+; data segment
+@label ram_offset
+  0x8000
+
+@label program
+; set up stack pointer to point to beginning of RAM
+  ldi ram_offset RA
+  ldr RA RF
+
+; call fibo subroutine with parameter 10
+  ldi 10 RA
+  csi fibo
+  hlt
+
+@label fibo
+; function fibo
+; parameters:
+;  RA   n : u16
+; return value:
+;  RA   fibo(n) : u16
+
+; store RB, RC on stack
+  spu RB
+  spu RC
+; if n < 2, return n
+  subi RA 2 RA
+  bri sign fibo_early
+; store also RD on stack
+  spu RD
+; a = 0
+  ldi 0 RB
+; b = 1
+  ldi 1 RC
+@label fibo_loop
+; v = a + b
+  add RB RC RD
+; a = b
+  mov RC RB
+; b = v
+  mov RD RC
+; n -= 1
+  dec RA
+; loop while n > 0
+  bri zero fibo_done
+  jpi fibo_loop
+@label fibo_early
+; restore used registers
+  spo RC
+  spo RB
+; return from subroutine
+  rsr
+@label fibo_done
+  mov RD RA
+; restore used registers
+  spo RD
+  spo RC
+  spo RB
+; return from subroutine
+  rsr
diff --git a/asm/sum.atk16 b/asm/sum.atk16
new file mode 100644
index 0000000..1bc3277
--- /dev/null
+++ b/asm/sum.atk16
@@ -0,0 +1,32 @@
+@use ext_std:*
+; Program: sum two values and store the result in RAM
+
+; ROM (and program execution) starts at offset 0x0
+@address 0x0
+  jpi program
+
+@label ram_offset
+  0x8000            ; store ram offset for later memory access
+
+@label program
+  ldi 10 RA         ; RA := 10
+  ldi 20 RB         ; RB := 20
+  add RA RB RC      ; RC := RA + RB
+  ldi ram_offset RD ; store address of ram_offset in RD
+  ldr RD RD         ; dereference ram_offset address
+@label debug
+  str RC RD         ; store RC in RAM
+
+; Check that 10 + 20 = 30
+  mov RC RA         ; RA := result of sum
+  ldi 30 RB         ; RB := 30
+  sub RA RB RC      ; RC := RA - RB
+  bri zero success  ; if result is zero, jump to success
+
+  ldi 2 RA          ; RA := 2 to signal failure
+  hlt
+
+; Else
+@label success
+  ldi 1 RA          ; RA := 1 to signal success
+  hlt