diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/asm_eval.py (renamed from src/assembler_eval.py) | 0 | ||||
| -rw-r--r-- | src/asm_ops.py (renamed from src/assembler_ops.py) | 2 | ||||
| -rw-r--r-- | src/asm_pass1.py | 4 | ||||
| -rw-r--r-- | src/asm_pass2.py | 4 | ||||
| -rw-r--r-- | src/asm_pass3.py | 4 | ||||
| -rw-r--r-- | src/asm_pass4.py | 4 | ||||
| -rwxr-xr-x | src/assembler.py | 4 | ||||
| -rw-r--r-- | src/ext_std.py | 2 | ||||
| -rw-r--r-- | src/test.atk16 | 33 | ||||
| -rwxr-xr-x | src/test_alu.py | 48 | ||||
| -rw-r--r-- | src/test_fibo.atk16 | 66 | ||||
| -rw-r--r-- | src/test_sum.atk16 | 3 | ||||
| -rw-r--r-- | src/test_utils.py | 93 |
13 files changed, 12 insertions, 255 deletions
diff --git a/src/assembler_eval.py b/src/asm_eval.py index 691e4eb..691e4eb 100644 --- a/src/assembler_eval.py +++ b/src/asm_eval.py diff --git a/src/assembler_ops.py b/src/asm_ops.py index b55927b..74e7930 100644 --- a/src/assembler_ops.py +++ b/src/asm_ops.py @@ -1,5 +1,5 @@ from typing import Callable -from assembler_eval import * +from asm_eval import * from dataclasses import dataclass @dataclass diff --git a/src/asm_pass1.py b/src/asm_pass1.py index 6537aea..606a1a1 100644 --- a/src/asm_pass1.py +++ b/src/asm_pass1.py @@ -1,7 +1,7 @@ import importlib from dataclasses import dataclass -from assembler_ops import * -from assembler_eval import * +from asm_ops import * +from asm_eval import * @dataclass class Result1Line: diff --git a/src/asm_pass2.py b/src/asm_pass2.py index 261ba06..e7f48ac 100644 --- a/src/asm_pass2.py +++ b/src/asm_pass2.py @@ -1,6 +1,6 @@ from dataclasses import dataclass -from assembler_ops import * -from assembler_eval import * +from asm_ops import * +from asm_eval import * from asm_pass1 import * @dataclass diff --git a/src/asm_pass3.py b/src/asm_pass3.py index e8e44d3..038e3f7 100644 --- a/src/asm_pass3.py +++ b/src/asm_pass3.py @@ -1,6 +1,6 @@ from dataclasses import dataclass -from assembler_ops import * -from assembler_eval import * +from asm_ops import * +from asm_eval import * from asm_pass2 import * @dataclass diff --git a/src/asm_pass4.py b/src/asm_pass4.py index 926b354..3d4f45c 100644 --- a/src/asm_pass4.py +++ b/src/asm_pass4.py @@ -1,6 +1,6 @@ from dataclasses import dataclass -from assembler_ops import * -from assembler_eval import * +from asm_ops import * +from asm_eval import * from asm_pass3 import * @dataclass diff --git a/src/assembler.py b/src/assembler.py index 4e82deb..3f0c8bc 100755 --- a/src/assembler.py +++ b/src/assembler.py @@ -2,8 +2,8 @@ # Assemble ATK16 assembly to bytecode import sys -from assembler_ops import * -from assembler_eval import * +from asm_ops import * +from asm_eval import * from asm_pass1 import pass_1 from asm_pass2 import pass_2 from asm_pass3 import pass_3 diff --git a/src/ext_std.py b/src/ext_std.py index 5f41f60..11da8aa 100644 --- a/src/ext_std.py +++ b/src/ext_std.py @@ -1,4 +1,4 @@ -from assembler_ops import * +from asm_ops import * def expand_add(left: str, right: str, target: str) -> ExpandResult: return [["alr", "al_plus", left, right, target]] diff --git a/src/test.atk16 b/src/test.atk16 deleted file mode 100644 index 3f2d378..0000000 --- a/src/test.atk16 +++ /dev/null @@ -1,33 +0,0 @@ -; Program: sum two values and store the result in RAM - -@use ext_std:* - -; ROM (and program execution) starts at offset 0x0 -@address 0x0 - jpi program - -@label ram_offset - 0x8000 ; store ram offset for later memory access - -@label program - ldi RA 10 ; RA := 10 - ldi RB 20 ; RB := 20 - add RA RB RC ; RC := RA + RB - ldi RD @ram_offset ; store address of ram_offset in RD - ldr RD RD ; dereference ram_offset address -@label debug - str RD RC ; store RC in RAM - -; Check that 10 + 20 = 30 - mov RC RA ; RA := result of sum - ldi RB 30 ; RB := 30 - sub RA RB RC ; RC := RA - RB - bri zero @success ; if result is zero, jump to success - - ldi RA 2 ; RA := 2 to signal failure - hlt - -; Else -@label success - ldi RA 1 ; RA := 1 to signal success - hlt diff --git a/src/test_alu.py b/src/test_alu.py deleted file mode 100755 index af30443..0000000 --- a/src/test_alu.py +++ /dev/null @@ -1,48 +0,0 @@ -#!/usr/bin/env python3 - -from test_utils import * - -def make_alu_table() -> str: - alu = ALU() - n = 10000 - alu.generate_cases(n) - alu.process() - print(f"[test] running {n} ALU test cases") - return alu.to_table().strip() - -class ALU(TestGroup): - def __init__(self): - TestGroup.__init__(self, [ - Param("A", 0x0, 0xffff), - Param("B", 0x0, 0xffff), - Param("S", 0, 7), - ], [ - "Y", - "FLAGS", - ]) - - def process(self): - new_cases = [] - for kase in self.cases: - S = kase["S"] - A = kase["A"] - B = kase["B"] - kase["FLAGS"] = "x" - - match S: - case 0: Y = 0 - case 1: Y = (B - A) & 0xFFFF - case 2: Y = (A - B) & 0xFFFF - case 3: Y = (A + B) & 0xFFFF - case 4: Y = (A ^ B) & 0xFFFF - case 5: Y = (A | B) & 0xFFFF - case 6: Y = (A & B) & 0xFFFF - case 7: Y = 0xffff - - kase["Y"] = Y - new_cases.append(kase) - - self.cases = new_cases - -table = make_alu_table() -run_test("ALU", table) diff --git a/src/test_fibo.atk16 b/src/test_fibo.atk16 deleted file mode 100644 index 8bb7a6e..0000000 --- a/src/test_fibo.atk16 +++ /dev/null @@ -1,66 +0,0 @@ -@opt stack_pointer RF -@opt csr_scratch RH -@use ext_std:* - -; jump over data segment - jpi program - -; data segment -@label ram_offset - 0x8000 - -@label program -; set up stack pointer to point to beginning of RAM - ldi ram_offset RA - ldr RA RF - -; call fibo subroutine with parameter 10 - ldi 10 RA - csi fibo - hlt - -@label fibo -; function fibo -; parameters: -; RA n : u16 -; return value: -; RA fibo(n) : u16 - -; store RB, RC on stack - spu RB - spu RC -; if n < 2, return n - subi RA 2 RA - bri sign fibo_early -; store also RD on stack - spu RD -; a = 0 - ldi 0 RB -; b = 1 - ldi 1 RC -@label fibo_loop -; v = a + b - add RB RC RD -; a = b - mov RC RB -; b = v - mov RD RC -; n -= 1 - dec RA -; loop while n > 0 - bri zero fibo_done - jpi fibo_loop -@label fibo_early -; restore used registers - spo RC - spo RB -; return from subroutine - rsr -@label fibo_done - mov RD RA -; restore used registers - spo RD - spo RC - spo RB -; return from subroutine - rsr diff --git a/src/test_sum.atk16 b/src/test_sum.atk16 deleted file mode 100644 index 3f69a55..0000000 --- a/src/test_sum.atk16 +++ /dev/null @@ -1,3 +0,0 @@ - ldi RA 10 ; RA := 10 - ldi RB 20 ; RB := 20 - add RA RB RC ; RC := RA + RB diff --git a/src/test_utils.py b/src/test_utils.py deleted file mode 100644 index 1db23b2..0000000 --- a/src/test_utils.py +++ /dev/null @@ -1,93 +0,0 @@ -import random -from dataclasses import dataclass -import tempfile -import sys -import os - -def make_test_file(name: str, table: str) -> str: - return f"""<?xml version="1.0" encoding="utf-8"?> -<circuit> - <version>2</version> - <attributes/> - <visualElements> - <visualElement> - <elementName>Testcase</elementName> - <elementAttributes> - <entry> - <string>Label</string> - <string>{name}</string> - </entry> - <entry> - <string>Testdata</string> - <testData> - <dataString>{table}</dataString> - </testData> - </entry> - </elementAttributes> - <pos x="200" y="200"/> - </visualElement> - </visualElements> - <wires/> - <measurementOrdering/> -</circuit> - """ - -@dataclass -class Param: - name: str - min: int - max: int - -class TestGroup: - def __init__(self, inputs: list[Param], outputs: list[str]): - self.inputs = inputs - self.outputs = outputs - self.cases = [] - - def generate_cases(self, n = 1000): - for _ in range(n): - result = {} - for param in self.inputs: - val = random.randrange(param.min, param.max + 1) - result[param.name] = val - - self.cases.append(result) - - def process(self): - raise NotImplemented() - - def to_table(self) -> str: - names: list[str] = [] - for param in self.inputs: - names.append(param.name) - for output in self.outputs: - names.append(output) - - ret = " ".join(names) - ret += "\n" - - for case in self.cases: - row_vals = [] - for param_name in names: - row_vals.append(str(case[param_name])) - - ret += " ".join(row_vals) - ret += "\n" - - return ret - -def run_test(name: str, table: str): - if len(sys.argv) != 2: - print(f"usage: {sys.argv[0]} <circuit.dig>") - sys.exit(1) - - circuit_path = sys.argv[1] - _, test_path = tempfile.mkstemp(".dig") - - fc = make_test_file(name, table) - with open(test_path, "w") as f: - f.write(fc) - - stream = os.popen(f"make run-single-test circ={circuit_path} tests={test_path}") - output = stream.read() - print(output) |
