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| author | Jan Tuomi <jan@jantuomi.fi> | 2025-03-18 18:38:44 +0200 |
|---|---|---|
| committer | Jan Tuomi <jan@jantuomi.fi> | 2025-03-18 18:38:44 +0200 |
| commit | 69de37cdb25563f6cbd2a3c1a338b1e0dd47b3a4 (patch) | |
| tree | c1895044fd0051f919a989460be3ac39a6ab09b8 /atk16_fpga/Makefile | |
| parent | 06e8b8dbadf769507abf5368caee253ded139adc (diff) | |
Start reworking fpga impl
Diffstat (limited to 'atk16_fpga/Makefile')
| -rw-r--r-- | atk16_fpga/Makefile | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/atk16_fpga/Makefile b/atk16_fpga/Makefile new file mode 100644 index 0000000..cada068 --- /dev/null +++ b/atk16_fpga/Makefile @@ -0,0 +1,24 @@ +BIN ?= program.bin + +hardware.bin: top.v + apio verify + apio test + apio build + +.PHONY: hw +hw: hardware.bin + apio upload + +.PHONY: sw +sw: $(BIN) + iceprogduino -w -o 1M $(BIN) + +.PHONY: graph +graph: + yosys -f verilog -p "show -format dot -colors 1 -prefix hardware top" -q top.v + dot -Tsvg hardware.dot -o hardware.svg + open -a LibreWolf hardware.svg + +.PHONY: clean +clean: + apio clean |